A device includes a variable gain amplifier, a voltage shifter, a variable gain amplifier half replica module, and an analog to digital converter. The variable gain amplifier includes an input terminal to receive an input signal, an output terminal to provide a first output signal that is biased based on a first common-mode voltage reference. The voltage shifter circuit includes first and second input terminals, and an output terminal to provide, to the analog to digital converter, a third output signal that is biased based on a second common-mode voltage reference. The variable gain amplifier half replica module includes an output terminal coupled to the second input terminal of the voltage shifter circuit, the variable gain amplifier half replica module to control the third output signal of the voltage shifter circuit based on the first common-mode voltage reference and the second common-mode voltage reference.

The present invention provides GPA embodiments. In some embodiments, a GPA stage with a negative capacitance unit is provided.

The overall performance of a current sense amplifier system may be improved by increasing the common mode rejection of the system. In particular, improved current sense amplifiers may be configured to use a first signal path coupled to the amplifier and a first input terminal, wherein the first signal path is configured to measure the current through a device by generating a voltage proportional to the measured current, wherein the generated voltage includes a small signal voltage with a large common mode voltage, and a second signal path coupled to the amplifier and the first input terminal, wherein the second signal path is configured to reduce the common mode of the generated voltage by level shifting the generated voltage to reduce the common mode voltage.

A multi-protocol receiver for receiving at least one input signal comprises: a comparator, a protection controller, and a multi-stage current mode logic (CML) buffer. The comparator compares a reference voltage and a predefined voltage. At least one output of the comparator is coupled to at least one input of the protection controller. The multi-stage current mode logic buffer receives the input signal and the reference voltage. Outputs of the protection controller are coupled to control inputs of the multi-stage CML buffer for operating the multi-stage CML buffer to process the input signal and the reference signal.

The overall performance of a current sense amplifier system may be improved by increasing the common mode rejection of the system. In particular, improved current sense amplifier systems of this disclosure may be configured to use a first ADC path to measure a current flowing through a device, a second ADC path to measure a common mode value, a memory element to store a calibration value, and a summer block to output a voltage proportional to the measured current through the device by correcting a voltage value output by the first ADC path based on the measured common mode value of the second ADC path and the stored calibration value.

A device includes a variable gain amplifier, a voltage shifter, a variable gain amplifier half replica module, and an analog to digital converter. The variable gain amplifier includes an input terminal to receive an input signal, an output terminal to provide a first output signal that is biased based on a first common-mode voltage reference. The voltage shifter circuit includes first and second input terminals, and an output terminal to provide, to the analog to digital converter, a third output signal that is biased based on a second common-mode voltage reference. The variable gain amplifier half replica module includes an output terminal coupled to the second input terminal of the voltage shifter circuit, the variable gain amplifier half replica module to control the third output signal of the voltage shifter circuit based on the first common-mode voltage reference and the second common-mode voltage reference.

The present invention provides GPA embodiments. In some embodiments, a GPA stage with a negative capacitance unit is provided.

The overall performance of a current sense amplifier system may be improved by increasing the common mode rejection of the system. In particular, improved current sense amplifier systems of this disclosure may be configured to use a first ADC path to measure a current flowing through a device, a second ADC path to measure a common mode value, a memory element to store a calibration value, and a summer block to output a voltage proportional to the measured current through the device by correcting a voltage value output by the first ADC path based on the measured common mode value of the second ADC path and the stored calibration value.

The overall performance of a current sense amplifier system may be improved by increasing the common mode rejection of the system. In particular, improved current sense amplifiers may be configured to use a first signal path coupled to the amplifier and a first input terminal, wherein the first signal path is configured to measure the current through a device by generating a voltage proportional to the measured current, wherein the generated voltage comprises a small signal voltage with a large common mode voltage, and a second signal path coupled to the amplifier and the first input terminal, wherein the second signal path is configured to reduce the common mode of the generated voltage by level shifting the generated voltage to reduce the common mode voltage.

An electronic device includes a transimpedance amplifier stage having an amplifier end stage of the class AB type and a preamplifier stage coupled between an output of a frequency transposition stage and an input of the amplifier end stage. A self-biased common-mode control stage is configured to bias the preamplifier stage. The preamplifier stage is formed by a differential amplifier with an active load that is biased in response to the self-biased common-mode control stage.