Patent classifications
H03F2203/45182
AMPLIFIER PEAK DETECTION
A peak detector for a power amplifier is provided that includes a threshold voltage detector configured to pulse a detection current in response to an amplified output signal from the amplifier exceeding a peak threshold. A plurality of such peak detectors may be integrated with a corresponding plurality of power amplifiers in a transmitter. Should any peak detector assert an alarm signal or more than a threshold number of alarm signals during a given period, a controller reduces a gain for the plurality of power amplifiers.
AMPLIFYING CIRCUIT
An amplifying circuit includes a reference voltage generating circuit, a common-mode voltage conversion circuit, a common-mode negative feedback circuit, and an amplifying sub-circuit. The reference voltage generating circuit generates a first reference voltage, a second reference voltage, and a reference common-mode voltage according to a post-stage common-mode voltage. The common-mode voltage conversion circuit converts the pre-stage output differential signal into a differential input signal according to the reference common-mode voltage. The common-mode negative feedback circuit generates a control voltage to quickly establish a common-mode negative feedback of the amplifying sub-circuit, wherein the first reference voltage and the second reference voltage are used to cancel a baseline signal of the pre-stage output differential signal. The amplifying circuit can eliminate the baseline signal, convert the common-mode voltage and quickly establish the common-mode negative feedback.
AMPLIFIER HAVING IMPROVED SLEW RATE
Disclosed is an amplifier having a high slew rate without increasing power consumption. The amplifier includes an input unit, a conversion unit, an amplification unit, a frequency compensation circuit, and a slew rate improvement circuit. Alternatively, the amplifier includes an input unit, a conversion unit, an amplification unit, a frequency compensation circuit, a first slew rate improvement circuit, and a second slew rate improvement circuit.
AMPLIFIER CAPABLE OF MINIMIZING SHORT-CIRCUIT CURRENT OF OUTPUT STAGE WHILE HAVING IMPROVED SLEW RATE
Disclosed is an amplifier capable of minimizing short-circuit current of an output stage of a buffer upon transition of an output voltage while having a high slew rate without increasing power consumption. The amplifier includes an input unit, a conversion unit, an amplification unit, a frequency compensation circuit, and a short-circuit current minimization circuit. Alternatively, the amplifier includes an input unit, a conversion unit, an amplification unit, a frequency compensation circuit, a short-circuit current minimization circuit, and a slew rate improvement circuit.
COMPARATOR, PHOTOELECTRIC CONVERSION DEVICE, AND APPARATUS
A comparator according to an embodiment of the present disclosure includes a first differential transistor and a second differential transistor forming a differential pair, a first load transistor and a second load transistor respectively provided corresponding to the first differential transistor and the second differential transistor, and a first cascode transistor connected in cascode between the first differential transistor and the first load transistor.
Amplifier with dual current mirrors
An amplifier includes a first input transistor, a second input transistor, a first current mirror circuit, and a second current mirror circuit. The first input transistor is coupled to a first input terminal. The second input transistor is coupled to a second input terminal. The first current mirror circuit is coupled to the first input transistor and the second input transistor. The second current mirror circuit is coupled to the first input transistor, the second input transistor, and the first current mirror circuit.
Ethernet line driver
Some aspects of the disclosure provide for a circuit. In an example, the circuit includes an amplifier, a first transistor network, a second transistor network, a first resistor, a second resistor, and a third resistor. The amplifier has first and second inputs and first, second, third, and fourth outputs. The first transistor network is coupled to the first output of the amplifier and the second output of the amplifier. The second transistor network is coupled to the third output of the amplifier and the fourth output of the amplifier. The first resistor is coupled between the first transistor network and the second transistor network. The second resistor is coupled between the first transistor network and the first input of the amplifier. The third resistor is coupled between the second transistor network and the second input of the amplifier.
AMPLIFIER WITH DUAL CURRENT MIRRORS
An amplifier includes a first input transistor, a second input transistor, a first current mirror circuit, and a second current mirror circuit. The first input transistor is coupled to a first input terminal. The second input transistor is coupled to a second input terminal. The first current mirror circuit is coupled to the first input transistor and the second input transistor. The second current mirror circuit is coupled to the first input transistor, the second input transistor, and the first current mirror circuit.
ETHERNET LINE DRIVER
Some aspects of the disclosure provide for a circuit. In an example, the circuit includes an amplifier, a first transistor network, a second transistor network, a first resistor, a second resistor, and a third resistor. The amplifier has first and second inputs and first, second, third, and fourth outputs. The first transistor network is coupled to the first output of the amplifier and the second output of the amplifier. The second transistor network is coupled to the third output of the amplifier and the fourth output of the amplifier. The first resistor is coupled between the first transistor network and the second transistor network. The second resistor is coupled between the first transistor network and the first input of the amplifier. The third resistor is coupled between the second transistor network and the second input of the amplifier.
Multi-gain transconductance amplifier
A multiple-gain transconductance amplifier circuit is presented. It is developed by utilizing programmable gain source-coupling differential pair output stage forming multiple-gain transconductance amplifier outputs. A reconfigurable n.sup.th-order filter based on a multi-gain transconductance amplifier where the multi-gain transconductance amplifier includes a linear voltage-to-current converter and a programmable current-folding output stage was implemented. The filter achieves independent programmability while still using a single active device per pole. Further, the proposed multiple-gain transconductance amplifier can be employed to design poly phase filters and transconductance amplifier cell for an amplifier-based low-dropout regulator.