Patent classifications
H03F2203/45288
High output current transconductance amplifier
A transconductance amplifier (TCA) implemented with high electron mobility transistors (HEMTs) in a push-pull amplifier output stage provides a voltage controlled constant high output current to loads ranging from 10 mΩ to 1Ω with a bandwidth of 25 MHz. A driving stage for the HEMTs is implemented with variable gain amplifiers that amplify the input voltage signal and provide bias for the HEMTs. An automatic gain control may be connected between the TCA output and the variable gain amplifiers to ensure a constant current output for a varying load.
UNIVERSAL INTERFACE
An interface circuit includes an input circuit. The input circuit includes a first input pin, a second input pin and a third input pin. The input circuit further includes a first operational amplifier including a first output pin, a first non-inverting input pin electrically coupled to the first input pin via a first impedance and a first switch, and a first inverting input pin coupled to the first output pin. The input circuit also includes a second operational amplifier including a second output pin, a second non-inverting input electrically coupled to the second input pin via a second impedance and a second inverting input pin electrically coupled to the third input pin via a third impedance and a second switch. The first input pin and the second input pin are electrically coupled via a third switch and a fourth impedance.
OPERATIONAL AMPLIFIER AND METHOD FOR OPERATING AN OPERATIONAL AMPLIFIER
The present invention relates to an operational amplifier, including: a symmetrical differential amplifier; a local common mode feedback circuit coupled to the symmetrical differential amplifier; a tail current source circuit including at least one first transistor and a second transistor and a current source resistor. The tail current source circuit is configured to adjust a control voltage of the first transistor by using the second transistor such that a predetermined reference current flows through a load path of the first transistor.
Adaptable receiver amplifier
Provided herein are apparatus and methods for a multi-stage signal-processing circuit. The signal-processing circuit can include multiple configurable stages that can be cascaded and configured to process an input signal. Control circuitry can be used to select an output of the configurable stages. Serial data can be recovered with good signal integrity using a signal monitor with the configurable stages by virtually placing the signal monitor on a buffered output node.
Switching converter with adaptive compensation
A switching converter includes a voltage conversion circuit providing an output voltage from an input voltage and a PWM voltage generated in response to first and second oscillating voltages. The input stage of a transconductor circuit provides an input reference current following a difference between a reference voltage and a voltage dependent on the output voltage and according to a transconductance, and an output stage for providing an output reference current from the input reference current. A phase shifter shifts an oscillating reference voltage according to the output reference current to obtain the first and second oscillating voltages. The transconductance is controlled in response to the input voltage resulting in a change of the input reference current. Compensation for that change is provided by subtracting a variable compensation current from the input reference current, where the variable compensation current is generated in response to the input voltage.
Circuits and methods for maintaining gain for a continuous-time linear equalizer
A bias structure includes a reference voltage node connected to gate structures of a first NMOS transistor and a second NMOS transistor, a bias voltage node comprising a bias voltage, and a first op amp having a first input connected to the reference voltage, a second input connected to a drain of the first NMOS transistor, and an output connected to gate structures of a first PMOS transistor and a second PMOS transistor. The bias structure further includes a second op amp having a first input connected to the reference voltage, a second input connected to a drain of the second NMOS transistor, and an output connected to a gate structure of a third NMOS transistor and the bias voltage node. The first NMOS transistor matches a transistor of a differential pair of an integrated circuit device.
Transimpedance amplifier circuit
A transimpedance amplifier circuit (1) includes an amplifier (22) that amplifies a received signal, an automatic gain control (AGC) circuit (2) that controls the amplification gain of the amplifier by a first time constant in accordance with the level of the received signal, and a first selection circuit (25) that selects the first time constant from a plurality of predetermined values. This can simultaneously implement a short time constant of an AGC function necessary to instantaneously respond to a burst signal and a long time constant of the AGC function necessary to obtain a satisfactory bit error rate (BER) characteristic in a continuous signal by an inexpensive and compact circuit arrangement.
Instrumentation amplifier with digitally programmable input capacitance cancellation
An instrumentation amplifier that includes input capacitance cancellation is provided. The architecture includes programmable capacitors between the input stage and a current feedback loop of the instrumentation amplifier to cancel input capacitances from electrode cables and a printed circuit board at the front end. An on-chip calibration unit can be employed to calibrate the programmable capacitors and improve the input impedance.
SWITCHED INDUCTOR/TRANSFORMER FOR DUAL-BAND LOW-NOISE AMPLIFIER (LNA)
Certain aspects of the present disclosure generally relate to an amplifier configured to process signals received in different frequency bands, where at least a portion of the amplifier is shared between different modes corresponding to the different frequency bands. One example circuit generally includes an amplifier having at least one first transistor configured to amplify a first signal received in a first mode of operation (e.g., associated with a particular frequency band), and at least one second transistor configured to amplify a second signal received in a second mode of operation. The amplifier may also include a transformer comprising a primary winding and a secondary winding, and one or more switches configured to selectively couple the primary winding to the first transistor or the second transistor based on the first mode or the second mode of operation, respectively. In certain aspects, the transformer may be coupled to a transconductance circuit.
VARIABLE GAIN DISTRIBUTED AMPLIFIER SYSTEMS AND METHODS
Distributed amplifier systems and methods are disclosed. An example distributed amplifier system includes first stage traveling wave amplifier (TWA) circuitry that is controllable to provide one of a first set of discrete gain settings. The first stage TWA circuitry includes a first input transmission line, a first output transmission line, and a first plurality of amplifiers coupled antiparallel between the first input transmission line and the first output transmission line. The first set of discrete gain settings has approximately constant logarithmic spacing.