Aspects of the disclosure relate to a radio frequency phase shifter. An example includes an amplification stage to produce an amplified voltage, the amplification stage having a first amplifier with a first input coupled to a first output of a hybrid coupler and a second amplifier with a complementary second input coupled to a complementary second output of the hybrid coupler. A vector modulation stage coupled to the amplification stage receives the amplified voltage and produces a modulated vector, the vector modulation stage has an in-phase section and a quadrature section to control the phase of the modulated vector in response to a phase control signal. A varactor coupled across the first input and the second input of the amplification stage adjusts the capacitance between the first input and the second input in response to a capacitance control signal.

An electronic device may include wireless circuitry with a processor, a transceiver, an antenna, and a front-end module coupled between the transceiver and the antenna. The front-end module may include one or more radio-frequency amplifiers for amplifying a radio-frequency signal. The radio-frequency amplifier may include input transistors cross-coupled with capacitance neutralization transistors and/or coupled to cascode transistors. One or more n-type gain adjustment transistors may be coupled to source terminals of the capacitance neutralization transistors. One or more p-type gain adjustment transistors may be coupled to source terminals of the cascode transistors. One or more processors in the electronic device can selectively activate one or more of the gain adjustment transistors to reduce the gain of the radio-frequency amplifier without degrading noise performance and without altering the in-band frequency response of the radio-frequency amplifier.

The disclosure relates to technology for an apparatus having a current conveyer comprising a first stage having a first differential input, and a second stage having a second differential input. The first and second stages are configured to operate in a push-pull mode to provide an output signal at a current conveyer output between the first stage and the second stage. The apparatus has a first frequency mixer configured to generate a first mixer signal based on an input signal and an oscillator signal having a first frequency. The first frequency mixer is configured to provide the first mixer signal to the first differential input. The apparatus has a second frequency mixer configured to generate a second mixer signal based on the input signal and a second oscillator signal having the first frequency. The second frequency mixer is configured to provide the second mixer signal to the second differential input.

A differential amplifier is provided. The differential amplifier includes a first single-ended amplifying means including at least a first terminal and a second terminal, a second single-ended amplifying means including at least a first terminal and a second terminal, a first transmission line, and a second transmission line. In this context, the first terminal of the first single-ended amplifying means is connected to the second terminal of the second single-ended amplifying means via the first transmission line. In addition to this, the first terminal of the second single-ended amplifying means is connected to the second terminal of the first single-ended amplifying means via the second transmission line.

Measurement of signal power for variable or time varying signals. A log-linear VGA coupled in a feedback configuration to a difference detector and an integrator, includes a set of amplifier cells selectable by a sliding current generator, producing a sum of outputs. Outputs of the sliding current generator include a first control current provided using a sum of amplified currents, a sequence of intermediate control currents, and a final control current provided using a sum of amplified currents. Control currents to be summed can be differentially amplified or attenuated; attenuators include capacitors to compensate for capacitive loading. Selectable amplifier cells are differentially amplified or attenuated. Isolating switches and canceling stages reduce the effects of leakage between adjacent amplifier cells. The sliding current generator can have boosted current to first and last amplifier cells, providing a more linear-in-dB gain near a relative maximum or minimum.

A dynamic amplifier includes an amplifier configured to differentially amplify first and second input signals to generate first and second output signals, a bias circuit, and a variable impedance circuit. The bias circuit is connected between a first power node configured to supply a first source voltage and the amplifier, and configured to apply bias to the amplifier. The variable impedance circuit is connected between the amplifier and a second power node configured to supply a second source voltage that is lower than the first source voltage. The variable impedance circuit is configured to adjust amplification gain of the amplifier, by adjusting impedance based on a magnitude of one among the first and second input signals and the first and second output signals.

Cross-coupling of switched-capacitor output common-mode feedback capacitors in dynamic residue amplifiers is provided via a cross-coupled amplifier, comprising: a current source connected to a first node; a feedback capacitor connected to the first node and a second node; a feedback resistor connected between the second node and ground; an amplifier having an input connected to the second node; a gain transistor having: a drain connected to the first node; a source connected to ground; and a gate connected to an output of the amplifier; and a load capacitor connected to the first node and ground.

An electronic device may include wireless circuitry with a processor, a transceiver, an antenna, and a front-end module coupled between the transceiver and the antenna. The front-end module may include one or more power amplifiers for amplifying a signal for transmission through the antenna. A power amplifier may include a phase distortion compensation circuit. The phase distortion compensation circuit may include one or more n-type metal-oxide-semiconductor capacitors configured to receive a bias voltage. The bias voltage may be set to provide the proper amount of phase distortion compensation.

Methods, systems, and devices for feedback for multi-level signaling in a memory device are described. A receiver may use a modulation scheme to communicate information with a host device. The receiver may include a first circuit, a second circuit, a third circuit, and a fourth circuit. Each of the first circuit, the second circuit, the third circuit, and the fourth circuit may determine, for a respective clock phase, a voltage level of a signal modulated using the modulation scheme. The receiver may include a first feedback circuit, a second feedback circuit, a third feedback circuit, and a fourth feedback circuit. The first feedback circuit that may use information received from the first circuit at the first clock phase and modify the signal input into the second circuit for the second clock phase.

A power amplifier circuit includes a first amplifier that amplifies an input signal and outputs an output signal; a second amplifier that, in accordance with a control signal, amplifies a signal corresponding to the input signal, generates a signal having an opposite phase to that of the output signal, and adds the signal to the output signal; and a control circuit that supplies the control signal to the second amplifier. The control circuit outputs the control signal so that during operation of the power amplifier circuit in a first power mode, a gain of the second amplifier is not less than zero and less than a predetermined level and during operation in a second power mode lower than the first power mode in output power level, a gain of the second amplifier is not less than the predetermined level and less than a gain of the first amplifier.