A two-stage differential amplifier with cross-coupled compensation capacitors. The differential amplifier includes first amplifier circuitry receiving a differential input voltage and presenting first and second intermediate outputs. The amplifier further includes a second amplifier stage with a first leg having an input coupled to the second intermediate output of the first amplifier circuitry, and a second leg having an input coupled to the first intermediate output of the first amplifier circuitry. A compensation capacitor is provided for each leg of the second amplifier stage, each coupled between the output of that amplifier leg and its input. A first cross-coupled capacitor is coupled between the output of the first amplifier leg to the input of the second amplifier leg, and a second cross-coupled capacitor is coupled between the output of the second amplifier leg and the input of the first amplifier leg.

A fully-differential two-stage operational amplifier circuit is provided, and it includes a first-stage amplification circuit, a second-stage amplification circuit, a common-mode signal acquisition circuit, a common-mode feedback circuit and a bias circuit. The first-stage amplification circuit has a telescopic structure and receives differential input signals IN.sub.P and IN.sub.N. The second-stage amplification circuit has a common-source structure and outputs differential output signals OUT.sub.P and OUT.sub.N. The common-mode signal acquisition circuit receives differential output signals, and outputs an operational amplifier output common-mode signal V.sub.CMO. The common-mode feedback circuit outputs common-mode feedback signals VB.sub.1 and VB.sub.2 to the first-stage amplifier circuit and the second-stage amplifier circuit respectively; The bias circuit outputs a bias voltage VB.sub.3 to the first-stage amplifier circuit, and outputs bias voltages VB.sub.4 and VB.sub.5 to the first-stage amplifier circuit respectively.

An amplifier circuit comprises a first amplifier circuit stage including input devices connected to inputs of the amplifier circuit, a second amplifier circuit stage coupled to the first amplifier stage, a common mode extraction circuit configured to extract a DC common mode voltage of the first amplifier stage, and a bias circuit configured to bias one or more output devices of the second amplifier circuit stage using the DC common mode voltage.

According to one embodiment, a power amplifying device includes a first amplifier configured to output a first output signal, a second amplifier configured to output a second output signal, a first circuit configured to output a third signal obtained by limiting a magnitude of a voltage value of the first output signal and a fourth signal obtained by limiting a magnitude of a voltage value of the second output signal, and a second circuit configured to transmit an average value of a voltage value of the third signal and a voltage value of the fourth signal, as a first feedback voltage to the first amplifier and the second amplifier.

An automatic gain control circuit includes a linear-to-log conversion circuit, a current amplifier circuit, and an amplitude sense circuit. The current amplifier circuit includes a current input terminal coupled to an output terminal of the linear-to-log conversion circuit. The amplitude sense circuit includes an input terminal coupled to an output terminal of the current amplifier circuit, and an output terminal coupled to a gain control input terminal of the current amplifier circuit.

According to one embodiment, a semiconductor integrated circuit includes first and second power supply lines, first and second nodes, and first and second circuits. The first circuit is configured to supply a first current to the second power supply line, from the first node or the second node. The second circuit is configured to supply a second current from the first power supply line to the first node based on a magnitude of the first current, and to supply a third current from the first power supply line to the second node based on the magnitude of the first current.

An amplifier includes a first amplification circuit, a second amplification circuit including first and second amplification transistors controlled by the first amplification circuit to generate first and second output signals and a bias transistor turned on based on a bias signal to generate the first output signal, a filter circuit including a bias capacitor connected to the first amplification transistor and the bias transistor to generate the first bias signal using a first bias voltage, and a feedback circuit configured to receive the first and second output signals and output a feedback signal that adjusts an average of the first and second output signals to correspond to a reference signal, to the first amplifier. The filter circuit adjusts a voltage of the bias capacitor such that a voltage of the bias capacitor when the amplifier is disabled corresponds to a voltage of the bias capacitor when the amplifier is enabled.

A voltage-to-current converter circuit comprises an amplifier, a resistor, first and second feedback circuits, and an output circuit. The amplifier is configured to receive a differential input voltage signal. The resistor is coupled between first and second nodes of the amplifier. The first feedback circuit is coupled to a third node of the amplifier, provides feedback to the first and second nodes when the value of the input voltage signal is in a first range, and is turned off otherwise. The second feedback circuit is coupled to a fourth node of the amplifier, provides feedback to the first and second nodes when the value of the input voltage signal is in a second range different from the first range, and is turned off otherwise. The output circuit produces a differential current output signal having a value according to the value of the input voltage signal.

A two-stage differential amplifier with cross-coupled compensation capacitors. The differential amplifier includes first amplifier circuitry receiving a differential input voltage and presenting first and second intermediate outputs. The amplifier further includes a second amplifier stage with a first leg having an input coupled to the second intermediate output of the first amplifier circuitry, and a second leg having an input coupled to the first intermediate output of the first amplifier circuitry. A compensation capacitor is provided for each leg of the second amplifier stage, each coupled between the output of that amplifier leg and its input. A first cross-coupled capacitor is coupled between the output of the first amplifier leg to the input of the second amplifier leg, and a second cross-coupled capacitor is coupled between the output of the second amplifier leg and the input of the first amplifier leg.

The present invention is directed to electrical circuits and techniques thereof. More specifically, an embodiment of the present invention provides a line driver with transistors directly coupled to the ground, and a bias voltage is coupled common mode resistors of the line driver. There are other embodiments as well.