A high CMRR neural signal amplifier is configured for supply rail common mode feedback (SR-CMFB) whereby a set of CMFB signals is provided to supply rails of front end LNAs. High CMRR is maintained through buffering outputs of front end signal LNAs and a reference LNA coupled to signal and reference inputs of second stage amplifiers, respectively; and buffering the reference LNA output using an active/guard buffer pair, whereby across a plurality of distinct multiplexing time intervals, during each multiplexing time interval one buffer of the pair functions as an active buffer that drives second stage amplifier reference inputs corresponding to second stage amplifier outputs being multiplexed to a set of multiplexor outputs, and the other buffer of the pair functions as a guard buffer coupled to other second stage amplifier reference inputs corresponding to second stage amplifier outputs not being multiplexed to the set of multiplexor outputs.

A shaper circuit includes a first amplifier including an input and an output, the input being configured to receive an input signal, which includes one or more current pulses, a feedback component coupled to the output and to the input of the first amplifier thereby forming a feedback loop of the first amplifier, and an RC component coupled to the output of the first amplifier and to a reference potential terminal. Therein the shaper circuit is configured to provide an output signal as a function of the input signal, the output signal including one or more voltage pulses, and the RC component is configured to largely cancel a low frequency pole of the feedback loop of the first amplifier.

A receiver circuit is configured to receive input signals having a first reference voltage level. The first reference voltage level is a first logical high voltage level. The receiver circuit comprises an input stage comprising a resistive voltage divider. The resistive voltage divider is configured to convert the input signals having the first reference voltage level to input signals having a second reference voltage level. The second reference voltage level is a second logical high voltage level. The receiver circuit comprises a preamplifier configured to receive and amplify the input signals having the second reference voltage level.

An oscilloscope probe includes a tip network, a low-loss signal cable, and a terminating assembly. The tip network is connected to the signal cable and is configured to electrically connect to a device under test via a tip network node. The terminating assembly includes an amplifier, a feedback network and a terminating attenuator. The amplifier has an inverting input, a non-inverting input connected to ground, and an amplifier output configured to connect to an oscilloscope input. The feedback network is connected between the inverting input and the amplifier output. The terminating attenuator includes a first loop circuit and a second loop circuit. The first loop circuit is provided between the signal cable and the inverting input of the amplifier. The second loop circuit is provided between the signal cable, and ground. Resistance of terminating resistors in the loop circuits are selected to match characteristic impedance of the signal cable.

An oscilloscope probe includes a tip network, a low-loss signal cable, and a terminating assembly. The tip network is connected to the signal cable and is configured to electrically connect to a device under test via a tip network node. The terminating assembly includes an amplifier, a feedback network and a terminating attenuator. The amplifier has an inverting input, a non-inverting input connected to ground, and an amplifier output configured to connect to an oscilloscope input. The feedback network is connected between the inverting input and the amplifier output. The terminating attenuator includes a first loop circuit and a second loop circuit. The first loop circuit is provided between the signal cable and the inverting input of the amplifier. The second loop circuit is provided between the signal cable, and ground. Resistance of terminating resistors in the loop circuits are selected to match characteristic impedance of the signal cable.

A receiver circuit is configured to receive input signals having a first reference voltage level. The first reference voltage level is a first logical high voltage level. The receiver circuit comprises an input stage comprising a resistive voltage divider. The resistive voltage divider is configured to convert the input signals having the first reference voltage level to input signals having a second reference voltage level. The second reference voltage level is a second logical high voltage level. The receiver circuit comprises a preamplifier configured to receive and amplify the input signals having the second reference voltage level.

A system for gene detection includes a sensor module including a plurality of magnetic sensors in an arrangement of a matrix and a signal processing chip including a front-end circuit and a signal processing circuit. The sensor module is formed on the signal processing chip through sputtering. The signal processing chip is configured to transform variation of the reluctivity of the magnetic sensors into a first electrical signal, process the first electrical signal and output a second electrical signal representing a detection result of a DNA molecule to be detected. The front-end circuit includes a row address selector, a column address selector, a pre-amplifier and a biasing circuit. The magnetic sensors are chemically pretreated and combined with a biological probe. The combined magnetic sensors and biological probe are in sufficient contact with combined magnetic particles and DNA molecules to be detected.

A high CMRR neural signal amplifier is configured for supply rail common mode feedback (SR-CMFB) whereby a set of CMFB signals is provided to supply rails of front end LNAs. High CMRR is maintained through buffering outputs of front end signal LNAs and a reference LNA coupled to signal and reference inputs of second stage amplifiers, respectively; and buffering the reference LNA output using an active/guard buffer pair, whereby across a plurality of distinct multiplexing time intervals, during each multiplexing time interval one buffer of the pair functions as an active buffer that drives second stage amplifier reference inputs corresponding to second stage amplifier outputs being multiplexed to a set of multiplexor outputs, and the other buffer of the pair functions as a guard buffer coupled to other second stage amplifier reference inputs corresponding to second stage amplifier outputs not being multiplexed to the set of multiplexor outputs.

A circuit may include first and second input nodes, first and second output nodes, first and second intermediate nodes, first and second resistances, a first amplification transistor coupled to the first input node, the first resistance, and the first intermediate node and a second amplification transistor coupled to the second input node, the second resistance, and the second intermediate node. The circuit may also include a first active device coupled to the first output node and the first intermediate node, a second active device coupled to the second output node and the second intermediate node, a first output transistor coupled to the first output node and configured to conduct based on a second intermediate signal on the second intermediate node, and a second output transistor coupled to the second output node and configured to conduct based on a first intermediate signal on the first intermediate node.

A travelling wave amplifier (TWA) with a widened frequency bandwidth is disclosed. The TWA include input transmission lines, amplifier units connected in parallel between the input terminal and the out terminal of the TWA. Each of the amplifier units configures an emitter follower in the front end thereof and an amplifying section. A feature of the TWA is that compensation units that compensates the high frequency performance of the TWA are implemented in the input transmission lines and/or integrated with the amplifier units.