Methods, apparatus, systems, and articles of manufacture are disclosed to generate a modulation protocol to output audio. An example apparatus includes a modulation circuit including a first input, a second input, a first output, and a second output; a first gate coupled to the first output of the modulation circuit; a second gate coupled to the second output of the modulation circuit; a first multiplexer including a first input coupled to the first output of the modulation circuit, a second input coupled to the output of the second gate, and an output coupled to a first switch; and a second multiplexer including a first input coupled to the second output of the modulation circuit, a second input coupled to the output of the first gate, and an output coupled to a second switch.

An apparatus for turning off a cascode amplifier having a common-base transistor and a common-emitter transistor is disclosed that includes the cascode amplifier, a feedback circuit, and a bias circuit. The feedback circuit is configured to receive a collector-voltage from the collector of the common-emitter transistor when the common-emitter transistor is switched to a first OFF state and produce a first feedback signal. The collector-voltage is equal to an emitter voltage of the common-base transistor and the collector-voltage increases in response to switching the common-emitter transistor to the first OFF state. The bias circuit is configured to receive the first feedback signal and produce a bias-voltage. A first base-voltage is produced from the bias-voltage. The cascode amplifier is configured to receive the first base-voltage and a second base-voltage. The common-base transistor is configured to switch to a second OFF state in response to receiving the second base-voltage.

An apparatus for turning off a cascode amplifier having a common-gate transistor and a common-source transistor is disclosed that includes the cascode amplifier, a feedback circuit, and a bias circuit. The feedback circuit is configured to receive a drain-voltage from the drain of the common-source transistor when the common-source transistor is switched to a first OFF state and produce a first feedback signal. The drain-voltage is equal to a source voltage of the common-gate transistor and the drain-voltage increases in response to switching the common-source transistor to the first OFF state. The bias circuit is configured to receive the first feedback signal and produce a bias-voltage. A first gate-voltage is produced from the bias-voltage. The cascode amplifier is configured to receive the first gate-voltage and a second gate-voltage. The common-gate transistor is configured to switch to a second OFF state in response to receiving the second gate-voltage.

A circuit for downlink/uplink operational mode switching in a TDD wireless communication system comprises a field-effect transistor operatively connected to a power amplifier on the downlink path of a RF front-end apparatus in a TDD wireless communication system, a first voltage generator connected to a large-value first resistor, a second voltage generator connected to a second resistor, a large-value hold capacitor, and a sample-and-hold circuit configured to be switched between a reception configuration, wherein the first voltage generator is connected to the gate of the field-effect transistor and the large-value capacitor is connected to the first voltage generator through the first resistor, and a transmission configuration, wherein the gate of the field-effect transistor is connected to the hold capacitor and the hold capacitor is connected to the second voltage generator through the second resistor.

A power amplifier may include a first amplifying circuit configured to amplify an input RF signal; a second amplifying circuit connected to the first amplifying circuit in parallel configured to amplify the input RF signal; and a controller connected to at least one of the first amplifying circuit and the second amplifying circuit and configured to output a control signal in order to control an on-off state of at least one of the first amplifying circuit and the second amplifying circuit. Such an approach provides high efficiency without adding significant complexity to the power amplifier.

Disclosed herein are power amplification systems that are dynamically biased based on a signal indicative of an envelope of the signal being amplified. The power amplification systems include a power amplifier configured to amplify an input radio-frequency (RF) signal to generate an output RF signal when biased by a biasing signal. The power amplification systems also include a bias component configured to generate the biasing signal based on an envelope signal indicative of an envelope of the input RF signal. The biasing signal can improve or enhance the linearity of the power amplification systems.

A power amplifier has an amplifier cell with an input terminal receiving an input signal and an output terminal providing an output signal. A bias network is coupled to the output terminal of the amplifier cell to provide a bias signal to the amplifier cell. A shutdown circuit is coupled to the bias network to disable the bias network in response to the input signal. The shutdown circuit has a transistor with a first conduction terminal coupled to the bias network, a second conduction terminal coupled to a power supply terminal. The shutdown circuit further has a first resistor with a first terminal coupled to the input terminal, and a second resistor with a first terminal coupled to a second terminal of the first resistor at a node, and a second terminal coupled to the power supply terminal. The control terminal of the transistor is coupled to the node.

An electronic device including an amplifier which includes a first transistor configured to receive an input signal through a gate terminal thereof and having a source terminal electrically connected to ground, a second transistor configured to transmit an output signal through a drain terminal thereof and having a gate terminal electrically connected to the ground, and a switch electrically connected to the gate terminal of the second transistor and configured to switch a voltage being supplied to the gate terminal of the second transistor in accordance with turn-on or turn-off of the amplifier.

Methods and apparatus for providing adaptive biasing to power amplifiers. Adaptive bias circuits are configured to provide sharp turn on and/or current clamping to improve the efficiency of a power amplifier over a wide input signal bandwidth. Sharp turn on may be achieved using a subtraction technique to subtract outputs from multiple detectors. Clamping may be achieved using MOSFET device characteristics to pull the device from the triode region into the saturation, subtraction techniques to subtract the outputs from multiple detectors, and/or by using circuit devices, such as diodes.

RF receive circuitry, which includes a first output impedance matching circuit coupled to a first alpha output of a first alpha LNA, a second output impedance matching circuit coupled to a first beta output of a first beta LNA, and a first dual output RF LNA, is disclosed. The first dual output RF LNA includes the first alpha LNA, the first beta LNA, and a first gate bias control circuit, which is coupled between a first alpha input of the first alpha LNA and ground; is further coupled between a first beta input of the first beta LNA and the ground; is configured to select one of enabled and disabled of the first alpha LNA using an alpha bias signal via the first alpha input; and is further configured to select one of enabled and disabled of the first beta LNA using a beta bias signal via the first beta input.