A frequency-modulated continuous-wave radar system includes a waveform generator, a delta-sigma modulation circuit, a voltage controlled oscillator, a frequency divider circuit, a control circuit, an injection locked oscillator, a power amplifier circuit, a first power detection circuit, a second power detection circuit, a third power detection circuit, and a calibration engine circuit. The waveform generator, the delta-sigma modulation circuit, the voltage controlled oscillator, the frequency divider circuit, and the control circuit form a phase locked loop. The calibration engine circuit is coupled to the delta-sigma modulation circuit, the voltage controlled oscillator, the injection locked oscillator, the power amplifier circuit, the first power detection circuit, the second power detection circuit, and the third power detection circuit for adjusting frequency gains of the voltage controlled oscillator, the injection locked oscillator, and the power amplifier circuit to approach wideband flatness frequency responses.

A frequency-modulated continuous-wave radar system includes a waveform generator, a delta-sigma modulation circuit, a voltage controlled oscillator, a frequency divider circuit, a control circuit, an injection locked oscillator, a power amplifier circuit, a first power detection circuit, a second power detection circuit, a third power detection circuit, and a calibration engine circuit. The waveform generator, the delta-sigma modulation circuit, the voltage controlled oscillator, the frequency divider circuit, and the control circuit form a phase locked loop. The calibration engine circuit is coupled to the delta-sigma modulation circuit, the voltage controlled oscillator, the injection locked oscillator, the power amplifier circuit, the first power detection circuit, the second power detection circuit, and the third power detection circuit for adjusting frequency gains of the voltage controlled oscillator, the injection locked oscillator, and the power amplifier circuit to approach wideband flatness frequency responses.

In conventional high data rate receivers, the transmitted optical signal has poor extinction ratio and translates into a small modulated current with a large DC current, which saturates the receiver TIA and amplifiers, and significantly degrades the gain and bandwidth performance. Consequently, cancelling PD DC current in high data rate receivers is desired for proper operation. Differential TIA schemes, i.e. providing separate AC-coupled and DC-coupled paths, in parallel, provide better linearity for large input currents and low gain settings. To AC couple the PD to the TIA using passive AC-coupling circuitry, an AC-coupling capacitor (C.sub.C) is positioned between the PD and the TIA to block the DC current, while passing the modulated AC current to the TIA. A DC cancellation circuit may be provided, without a capacitor, to maintain the receiver input bias while suppressing any DC component generated by the PD for the DC-coupled path.

In conventional high data rate receivers, the transmitted optical signal has poor extinction ratio and translates into a small modulated current with a large DC current, which saturates the receiver TIA and amplifiers, and significantly degrades the gain and bandwidth performance. Consequently, cancelling PD DC current in high data rate receivers is desired for proper operation. Differential TIA schemes, i.e. providing separate AC-coupled and DC-coupled paths, in parallel, provide better linearity for large input currents and low gain settings. To AC couple the PD to the TIA using passive AC-coupling circuitry, an AC-coupling capacitor (C.sub.C) is positioned between the PD and the TIA to block the DC current, while passing the modulated AC current to the TIA. A DC cancellation circuit may be provided, without a capacitor, to maintain the receiver input bias while suppressing any DC component generated by the PD for the DC-coupled path.

An oscillating circuit has an injection-locked oscillator (ILO) and a calibration circuit. The ILO has a Gm cell and an LC tank. A first node of the Gm cell receives a first injection signal, and a second node of the Gm cell receives a second injection signal. The first injection signal and the second injection signal are differential signals. The Gm cell provides a negative resistance between a first output end and a second output end of the Gm cell. When the calibration circuit tunes a resonant frequency of the LC tank of the ILO, the magnitude of the negative resistance is reduced to control the ILO to stop self-oscillating. After finishing tuning the resonant frequency of the LC tank, the calibration circuit controls the ILO to start self-oscillating by increasing the magnitude of the negative resistance.

An oscillating circuit has an injection-locked oscillator (ILO) and a calibration circuit. The ILO has a Gm cell and an LC tank. A first node of the Gm cell receives a first injection signal, and a second node of the Gm cell receives a second injection signal. The first injection signal and the second injection signal are differential signals. The Gm cell provides a negative resistance between a first output end and a second output end of the Gm cell. When the calibration circuit tunes a resonant frequency of the LC tank of the ILO, the magnitude of the negative resistance is reduced to control the ILO to stop self-oscillating. After finishing tuning the resonant frequency of the LC tank, the calibration circuit controls the ILO to start self-oscillating by increasing the magnitude of the negative resistance.

The invention provides an amplifier for LCD, comprising: an operational amplification module and an amplitude-limiting module serially connected to the operational amplification module; the operational amplification module comprising: an operational amplifier, a first resistor, a second resistor, a capacitor, a sampling voltage input terminal, a first reference voltage input terminal and a compensation voltage output terminal; the amplitude-limiting module being connected serially between the capacitor and the second resistor, the amplitude-limiting module comprising a first Schottky diode and a second Schottky diode connected in parallel, and a second reference voltage input terminal connected between the first Schottky diode and the second Schottky diode; an anode of the first Schottky diode and a cathode of the second Schottky diode being both connected between the capacitor and the second resistor. The amplifier for LCD of the invention is stable and reliable.

The invention provides an amplifier for LCD, comprising: an operational amplification module and an amplitude-limiting module serially connected to the operational amplification module; the operational amplification module comprising: an operational amplifier, a first resistor, a second resistor, a capacitor, a sampling voltage input terminal, a first reference voltage input terminal and a compensation voltage output terminal; the amplitude-limiting module being connected serially between the capacitor and the second resistor, the amplitude-limiting module comprising a first Schottky diode and a second Schottky diode connected in parallel, and a second reference voltage input terminal connected between the first Schottky diode and the second Schottky diode; an anode of the first Schottky diode and a cathode of the second Schottky diode being both connected between the capacitor and the second resistor. The amplifier for LCD of the invention is stable and reliable.

A method for enhancing linearity of the receiver front-end system includes receiving a radio frequency signal by an antenna, converting the radio frequency signal to first differential signals by a transformer module, adjusting frequencies of the first differential signals to generate second differential signals by a mixer module, detecting a common signal in order to reduce a common error of the second differential signals, and generating third differential signals according to a reference signal after the common error is reduced from the second differential signals. The first differential signals, the second differential signals, and the third differential signals are unbalanced.

A frequency-modulated continuous-wave radar system includes a waveform generator, a delta-sigma modulation circuit, a voltage controlled oscillator, a frequency divider circuit, a control circuit, an injection locked oscillator, a power amplifier circuit, a first power detection circuit, a second power detection circuit, a third power detection circuit, and a calibration engine circuit. The waveform generator, the delta-sigma modulation circuit, the voltage controlled oscillator, the frequency divider circuit, and the control circuit form a phase locked loop. The calibration engine circuit is coupled to the delta-sigma modulation circuit, the voltage controlled oscillator, the injection locked oscillator, the power amplifier circuit, the first power detection circuit, the second power detection circuit, and the third power detection circuit for adjusting frequency gains of the voltage controlled oscillator, the injection locked oscillator, and the power amplifier circuit to approach wideband flatness frequency responses.