An optical light sensing device includes a detector operable to detect a light wave. The optical light sensing device also includes an integration circuit that includes an operational amplifier that is operable to reduce or cancel dark currents generated at the detector.

An optical light sensing device includes a detector operable to detect a light wave. The optical light sensing device also includes an integration circuit that includes an operational amplifier that is operable to reduce or cancel dark currents generated at the detector.

A first module is configured to, based on an input sample, determine a first duty cycle. A second module is configured to, based on a battery voltage and the first duty cycle, determine a second duty cycle. A third module is configured to: set a scalar value based on at least one of a battery current, an amplitude of the input sample, the second duty cycle, and an output voltage; and generate a start signal at a rate equal to a predetermined rate multiplied by the scalar value. A fourth module is configured to set a third duty cycle based on the second duty cycle and the scalar value. A fifth module is configured to generate a PWM output based on the start signal and the third duty cycle. A sixth module is configured to apply power to gates of FETs of a voltage converter based on the PWM output.

A first module is configured to, based on an input sample, determine a first duty cycle. A second module is configured to, based on a battery voltage and the first duty cycle, determine a second duty cycle. A third module is configured to: set a scalar value based on at least one of a battery current, an amplitude of the input sample, the second duty cycle, and an output voltage; and generate a start signal at a rate equal to a predetermined rate multiplied by the scalar value. A fourth module is configured to set a third duty cycle based on the second duty cycle and the scalar value. A fifth module is configured to generate a PWM output based on the start signal and the third duty cycle. A sixth module is configured to apply power to gates of FETs of a voltage converter based on the PWM output.

A switch circuit provides a first output signal and a second output signal for switching between ternary modulation and quaternary modulation for a target device. A first output signal is provided from one of a first signal, a second signal and a ground signal according to an input signal and a duty signal, wherein the first signal is generated through performing a one-bit left-shift operation for the input signal, and the second signal is generated through adding the input signal and the duty signal. A second output signal is provided from one of a third signal, a fourth signal and the ground signal according to the input signal and the duty signal, wherein the third signal is generated through subtracting the input signal from the duty signal, and the fourth signal is generated through performing a two's-complement transformation and the one-bit left-shift operation for the input signal.

A system for processing a signal in a signal chain having decentralized embedded power management of components of the signal chain includes an input circuit to generate a measurement signal responsive to a stimulus, where the measurement signal is indicative of a characteristic of the stimulus. The system additionally includes a signal converter circuit coupled to the input circuit to convert the measurement signal to a digital signal according to a timing condition for capturing a sample of the measurement signal. The signal converter includes a control circuit to provide electrical power to the input circuit based on the timing condition and a sampling circuit to capture the sample of the measurement signal responsive to an indicator signal generated by the sensor circuit.

Various implementations include a common mode voltage controller for a self-boosting push pull amplifier. In some implementations, input signal are processed by: calculating, based upon the input signal, a maximum duty cycle to achieve a target differential in an output of the self-boosting push pull amplifier; calculating, based on the input signal, a set of control parameters associated with adjusting a common mode voltage of the output; and generating, based on the input signal, a pair of signals configured to adjust the common mode voltage of the output, wherein the pair of signals include a gain adjustment and offset based on the maximum duty cycle and the set of control parameters, and wherein the pair of signals are configured to maintain the target differential in the output of the self-boosting push pull amplifier as the common mode voltage is adjusted to a different operating point.

A high bandwidth Hall sensor includes a high bandwidth path and a low bandwidth path. The relatively high offset (from sensor offset) of the high bandwidth path is estimated using a relatively low offset generated by the low bandwidth path. The relatively high offset of the high bandwidth path is substantially reduced by combining the output of the high bandwidth path with the output of the low bandwidth path to generate a high bandwidth, low offset output. The offset can be further reduced by including transimpedance amplifiers in the high bandwidth sensors to optimize the frequency response of high bandwidth Hall sensor.

An adaptive sample and hold circuit for signal amplifier range selection is presented. The adaptive sample and hold circuit has an input for receiving an input signal and an output for providing a sample-and-hold-voltage. It also includes a sample-and-hold-capacitor to generate the sample-and-hold-voltage from the input signal, and a range detector. The range detector is adapted to identify a range of the input signal and to adjust a voltage at the sample-and-hold-capacitor based on the range of the input signal to maintain the sample-and-hold-voltage within a predetermined voltage span.

A device includes a sensor signal input node and a high-pass filter stage. The high-pass filter stage includes an operational amplifier and a feedback integrator. The operational amplifier includes an input node coupled to the sensor signal input node. The feedback integrator is coupled between an output node of the operational amplifier and the input node of the operational amplifier to set a high-pass pole frequency of the high-pass filter stage.