A system may include a first input for receiving a first signal for driving an amplifier that drives a load, a second input for receiving a second signal driven by the amplifier, and an instability detector for detecting instability of a feedback loop for controlling the first signal based on comparison of the first signal and the second signal.

A system may include a first input for receiving a first signal for driving an amplifier that drives a load, a second input for receiving a second signal driven by the amplifier, and an instability detector for detecting instability of a feedback loop for controlling the first signal based on comparison of the first signal and the second signal.

An apparatus and system for a clock buffer. The clock buffer comprises a source follower, and the source follower comprises a voltage source and a resistor.

A method and an apparatus for generating a particle wave carrying an electric charge is provided. The method comprises: on the basis of waveform information pre-stored in a waveform storage module, generating a corresponding digital waveform signal; the waveform information comprising amplitude and phase; on the basis of a digital-to-analog conversion module connected to the waveform storage module, converting the digital waveform signal having a pre-set phase into an analog waveform signal; on the basis of a power amplification module connected to the digital-to-analog conversion module, performing power amplification on the analog waveform signal; on the basis of a high-voltage generator connected to the power amplification module, performing high-voltage amplification on the power signal of the analog waveform signal; and by means of a quasi-continuous emission electrode connected to the high-voltage generator, emitting a charged particle wave on the basis of the analog waveform voltage signal.

An amplifier circuit having an adjustable gain is provided. The amplifier circuit includes an input terminal, an output terminal, an amplifier, and an attenuation circuit. The input terminal receives an input signal, which is in turn received by an input terminal of the amplifier. An output terminal of the amplifier outputs the input signal that is amplified. The attenuation circuit is coupled between the output terminal of the amplifier and the output terminal to provide a plurality of attenuation to the input signal that is amplified and generate a first attenuation signal, or between the input terminal and the output terminal to provide the plurality of attenuations to the input signal and generate a second attenuation signal. A difference between an impedance value of the input terminal of the attenuation circuit and an impedance value of the output terminal of the attenuation circuit is within a predetermined range.

A phased array element includes a transmit portion having a plurality of amplifier paths, each amplifier path having a driver amplifier and a power amplifier, a first transformer coupled to the power amplifier of a first amplifier path of the plurality of amplifier paths and a second transformer coupled to the power amplifier of a second amplifier path of the plurality of amplifier paths, a secondary winding of each of the first transformer and the second transformer coupled together by a common transformer segment, a transmit phase shifter Sswitchably coupled to the plurality of amplifier paths, a receive portion coupled to the second transformer, the receive portion having a receive path having a low noise amplifier (LNA), and a receive phase shifter coupled to the LNA.

A phased array element includes a transmit portion having a plurality of amplifier paths, each amplifier path having a driver amplifier and a power amplifier, a first transformer coupled to the power amplifier of a first amplifier path of the plurality of amplifier paths and a second transformer coupled to the power amplifier of a second amplifier path of the plurality of amplifier paths, a secondary winding of each of the first transformer and the second transformer coupled together by a common transformer segment, a transmit phase shifter Sswitchably coupled to the plurality of amplifier paths, a receive portion coupled to the second transformer, the receive portion having a receive path having a low noise amplifier (LNA), and a receive phase shifter coupled to the LNA.

A power amplifying circuit includes multi-stage power amplifiers, bias circuits, and a control circuit. The bias circuits output corresponding bias currents based on corresponding control currents. The control circuit outputs the control currents to the bias circuits based on a control voltage. The power amplifiers include a first stage of first and second power amplifiers connected in parallel electrically. The bias circuits include first and second bias circuits. The control circuit includes first and second current output units. The first current output unit outputs, to the first bias circuit, a first control current which has a first current value when the control voltage is a first threshold voltage, and which increases linearly with the control voltage, and the second current output unit outputs, to the second bias circuit, a second control current, having a second constant current value, when the control voltage is the first threshold voltage or greater.

A switched emitter follower circuit is constituted by a transistor in which a base is connected to a signal input terminal, a power voltage is applied to a collector, and an emitter is connected to a signal output terminal, a capacitor in which one end is connected to the collector of the transistor, and the other end is connected to the emitter of the transistor, and a Gilbert-cell type multiplication circuit in which a positive-phase clock output terminal is connected to the emitter of the transistor, a negative-phase clock output terminal is connected to the base of the transistor, and a multiplication result of a differential clock signal and a differential clock signal input from an outside is output to the positive-phase clock output terminal and the negative-phase clock output terminal.

Provided herein are amplifiers, such as buffers, with increased headroom. An amplifier stage includes a follower transistor and current source configured to receive a power supply voltage comprising an alternating current component and a direct current component. The alternating current component of the power supply voltage has substantially the same frequency and magnitude as the input signal received by the follower transistor. In radio frequency (RF) and intermediate frequency (IF) buffer applications, for example, the increased headroom can allow for linear buffering of an input signals with increased amplitude so that the output power one decibel (OP1dB) compression point can be increased.