An audio processor and method of audio processing for an amplifier system is described. The audio processor may receive an audio signal and adapt the audio signal generating a time varying offset. The time varying offset may be combined with the audio signal resulting in a shifted the audio signal level. The processed audio signal may also be clipped to remove the negative samples values. The processed signal may be used to drive an amplifier designed to only accept positive (or negative) signals such as a class C amplifier.

Equipment that can comfortably hear mixed large sound and small sound at the same time by earphones and headphones is achieved. Level of rise and fall of an input signal waveform is logarithmically compressed and output to limit wave height, and an output signal is taken out from a wave-height-limited signal by eliminating or attenuating harmonic distortion. A limiter 6 limits an amplitude of an input sound signal. The integrator 7 is connected to the output-side of the limiter 6 and logarithmically compresses rise or fall of an output signal waveform from the limiter 6.

Equipment that can comfortably hear mixed large sound and small sound at the same time by earphones and headphones is achieved. Level of rise and fall of an input signal waveform is logarithmically compressed and output to limit wave height, and an output signal is taken out from a wave-height-limited signal by eliminating or attenuating harmonic distortion. A limiter 6 limits an amplitude of an input sound signal. The integrator 7 is connected to the output-side of the limiter 6 and logarithmically compresses rise or fall of an output signal waveform from the limiter 6.

A system that incorporates teachings of the present disclosure may include, for example, adjusting a tuning state of a matching network of the communication device, selecting a power offset from among a group of power offsets where the selected power offset is associated with a sub-band of operation of the communication device, and adjusting a value associated with a measured receive power or a transmit power of the communication device based on the selected power offset to generate an offset power value. Additional embodiments are disclosed.

Apparatus and methods for radio frequency (RF) signal limiting are provided. In certain embodiments, an RF signal limiting system includes a cascade of a front limiter and a biased limiter. Additionally, the front limiter provides an initial amount of limiting to an RF signal, while the biased limiter serves to further limit the RF signal. The biased limiter is adaptively biased such that the amount of limiting provided to the RF signal increases in response to an increase in the RF signal level. Such an RF signal limiting system can be used in a variety of applications, including protecting an input of a low noise amplifier (LNA).

In an audio system with a plurality of input signals, the input signals are prioritized from least important to most important. The level of the aggregate of all of the input signals is compared to a threshold level. If the level is greater than the threshold, the levels of one or more of the input signals are reduced one at a time, in order from the least important input signal to the most important input signal.

Multifunctional RF limiting amplifiers having various configurations and functions are disclosed. In a first configuration, the RF limiting amplifier includes an active load output circuit that allows one to adjust the output impedance based upon the anticipated connected load impedance. In a second configuration, the RF limiting amplifier includes a pair of emitter-followers to buffer the output of a first stage, allowing the RF limiting amplifier to drive one or more second stages. A third configuration includes a pair of RF limiting amplifiers with their outputs mixed to implement a down conversion function. The third configuration may be used to drive dual SAW resonators for detecting the presence of biological or chemical agents. The RF limiting amplifier may be implemented in either bipolar junction transistors or CMOS transistors.

A headset having game, chat and microphone audio signals is provided with a programmable signal processor for individually modifying the audio signals and a memory configured to store a plurality of user-selectable signal-processing parameter settings that determine the manner in which the audio signals will be altered by the signal processor. The parameter settings collectively form a preset, and one or more user-operable controls can select and activate a preset from the plurality of presets stored in memory. The parameters stored in the selected preset can be loaded into the signal processor such that the sound characteristics of the audio paths are modified in accordance with the parameter settings in the selected preset.

A headset having game, chat and microphone audio signals is provided with a programmable signal processor for individually modifying the audio signals and a memory configured to store a plurality of user-selectable signal-processing parameter settings that determine the manner in which the audio signals will be altered by the signal processor. The parameter settings collectively form a preset, and one or more user-operable controls can select and activate a preset from the plurality of presets stored in memory. The parameters stored in the selected preset can be loaded into the signal processor such that the sound characteristics of the audio paths are modified in accordance with the parameter settings in the selected preset.

A gain attenuation circuit that attenuates an input RF signal and transmits the attenuated RF signal to a power transistor is provided. The gain attenuation circuit includes a first diode connected between a first node positioned between a port to which the input RF signal is input and a control terminal of the power transistor, and a ground; a first transistor and a second transistor stacked between a first power source and the ground, and each including a diode-connection structure; and a third transistor configured to receive an operating voltage set by the first transistor and the second transistor through a control terminal, and operate the first diode based on the received operating voltage.