Provided is a wireless communication receiver including an antenna for receiving an RF signal; a first mixer, coupled to the antenna, for performing frequency conversion on the RF signal from the antenna by mixing the RF signal with a local oscillator signal to provide a first intermediate frequency (IF) signal; and a first filter, coupled to the first mixer, configured to pass a predetermined band of frequencies of the first IF signal and to generate a first channel signal. The first filter includes a negative feedback loop coupled to the first mixer for performing negative feedback loop control on the first IF signal; and a positive capacitive feedback loop coupled to the first mixer for performing positive capacitive feedback loop control on the first IF signal, the negative feedback loop and the positive capacitive feedback loop being coupled in parallel.

An amplifier circuit with in-band gain degradation compensation is shown. The amplifier circuit has an input-stage amplifier, at least one intermediate-stage amplifier, and an output-stage amplifier cascaded between an input port and an output port of the amplifier circuit. A compensation capacitor is coupled between the output port of the amplifier circuit and an output port of the input-stage amplifier. A high-order damping circuit is coupled to an output port of the intermediate-stage amplifier.

A filter can perform two filtering processes. The filter includes a switching circuit, a first filter circuit, and a second filter circuit. The first filter circuit is coupled to the switching circuit. The second filter circuit is coupled to the switching circuit. The first filter circuit performs a first filtering process on an input signal according to a state of the switching circuit. The first filter circuit and the second filter circuit work together to perform a second filtering process on the input signal according to the state of the switching circuit.

A filter includes a switching circuit, a first filter circuit, and a second filter circuit. The first filter circuit is coupled to the switching circuit. The second filter circuit is coupled to the switching circuit. The switching circuit is controlled to control the first filter circuit to perform a first filtering process on an input signal or control the first filter circuit to work in coordination with the second filter circuit to perform a second filtering process on the input signal.

A receiving device for receiving PLC signals, including a filtering stage linked to an input of the receiving device and configurable in at least two modes including a default mode, wherein the filtering stage passes at least first PLC signals included in a first frequency band and second PLC signals included in a second frequency band separate from the first frequency band, and a first selection mode, in which the filtering stage passes the first PLC signals and stops the second PLC signals; and a processing circuit linked to the filtering stage and arranged to receive frames of PLC signals, and, for each received frame, to analyse a preamble of the frame, and to dynamically configure the filtering stage in the first selection mode if the frame is a frame of first PLC signals.

An error amplifier for a pulse width modulation circuit is described. The amplifier includes an operational amplifier configured as an integrator and a feedback loop coupled between a signal output of the operational amplifier and an inverting input of the operational amplifier. The feedback loop comprises a feedback capacitor coupled to the signal output, a feedback resistor coupled to the feedback capacitor, and an integrator resistor coupled to the feedback resistor and the inverting input of the operational amplifier. A junction between the feedback resistor and the integrator resistor is configured to receive an input signal and a junction between the feedback capacitor and the feedback resistor is configured to receive a feedback signal from the pulse width modulation circuit.

An amplifier circuit with in-band gain degradation compensation is shown. The amplifier circuit has an input-stage amplifier, at least one intermediate-stage amplifier, and an output-stage amplifier cascaded between an input port and an output port of the amplifier circuit. A compensation capacitor is coupled between the output port of the amplifier circuit and an output port of the input-stage amplifier. A high-order damping circuit is coupled to an output port of the intermediate-stage amplifier.

We disclose transconductor-capacitor classical dynamical systems that emulate quantum dynamical systems and quantum-inspired systems by composing them with 1) a real capacitor, whose value exactly emulates the value of the quantum constant termed a Planck capacitor; 2) a quantum admittance element, which has no classical equivalent, but which can be emulated by approximately 18 transistors of a coupled transconductor system; 3) an emulated quantum transadmittance element that can couple emulated quantum admittances to each other; and 4) an emulated quantum transadmittance mixer element that can couple quantum admittances to each other under the control of an input. These four parts can be composed together to create arbitrary discrete-state, traveling-wave, spectral, or other quantum systems.

An error amplifier for a pulse width modulation circuit is described. The amplifier includes an operational amplifier configured as an integrator and a feedback loop coupled between a signal output of the operational amplifier and an inverting input of the operational amplifier. The feedback loop comprises a feedback capacitor coupled to the signal output, a feedback resistor coupled to the feedback capacitor, and an integrator resistor coupled to the feedback resistor and the inverting input of the operational amplifier. A junction between the feedback resistor and the integrator resistor is configured to receive an input signal and a junction between the feedback capacitor and the feedback resistor is configured to receive a feedback signal from the pulse width modulation circuit.

A receiving device for receiving PLC signals, including a filtering stage linked to an input of the receiving device and configurable in at least two modes including a default mode, wherein the filtering stage passes at least first PLC signals included in a first frequency band and second PLC signals included in a second frequency band separate from the first frequency band, and a first selection mode, in which the filtering stage passes the first PLC signals and stops the second PLC signals; and a processing circuit linked to the filtering stage and arranged to receive frames of PLC signals, and, for each received frame, to analyse a preamble of the frame, and to dynamically configure the filtering stage in the first selection mode if the frame is a frame of first PLC signals.