A phase shifter for altering the phase of a radio frequency signal is disclosed herein. A Lange coupler is used having reflective ports that are coupled to artificial transmission lines. The artificial transmission lines provide a reflection transmission path, the length of which can be determined by digital control lines. Transistors placed along the length of the central trace provide independent paths to ground that serve to shorten the electrical length of the ATL. Accordingly, by selectively turning the transistors on/off, the electrical length of the ATL can be selected and thus the amount of phase delay introduced by the phase shifter.

A finite impulse response (FIR) filter including an input of the FIR filter that receives an RF input signal, a clock input configured to receive a clock signal, an output of the FIR filter that provides a filtered output signal, a plurality of signal paths including a plurality of sample-and-hold circuits and a plurality of multipliers arranged in parallel, each signal path including a respective sample-and-hold circuit and a respective multiplier being configured to receive the RF input signal and the clock signal to provide a modulated output signal, an adder configured to receive n modulated output signals from the plurality of signal paths and combine the n modulated output signals to produce the filtered output signal, and a controller.

A programmable delay device that provides delays of more than 100 ns over a broad bandwidth is disclosed. The device includes an input stage that employs M sampling switched capacitor elements such that each sampling switched capacitor element samples at a rate of only 1/M of the fundamental sampling rate. The device includes a programmable delay stage with M programmable switched capacitor banks, each programmable switched capacitor bank having N delay switched capacitor storage elements. Thus, the programmable delay stage includes a total of M×N delay switched capacitor storage elements, thereby reducing the sampling rate by a factor of M×N. This reduced sampling rate permits much smaller sampling switches, resulting in reduced leakage current and enabling far longer programmable delay times. Lastly, the device includes an output reconstruction stage that reconstructs a delayed version of the input RF signal by combining signals from the programmable delay stage.

A finite impulse response (FIR) filter including an input of the FIR filter that receives an RF input signal, a clock input configured to receive a clock signal, an output of the FIR filter that provides a filtered output signal, a plurality of signal paths including a plurality of sample-and-hold circuits and a plurality of multipliers arranged in parallel, each signal path including a respective sample-and-hold circuit and a respective multiplier being configured to receive the RF input signal and the clock signal to provide a modulated output signal, an adder configured to receive n modulated output signals from the plurality of signal paths and combine the n modulated output signals to produce the filtered output signal, and a controller.

A filter circuit includes a filter that is disposed on a path connecting a common terminal and an input output terminal and uses a first frequency band as a pass band, a filter that is disposed on a path connecting the common terminal and an input output terminal and uses a second frequency band different from the first frequency band as a pass band, and a phase adjustment circuit that has an input terminal connected to the path and an output terminal connected to the path, and adjusts a phase of a signal in the first frequency band input from the path and outputs a signal having a phase different from a phase of the signal in the first frequency band to the output terminal, wherein the path and the path are paths through which a received signal passes.

An integrated circuit to drive a plurality of fluid actuators is disclosed. The integrated circuit analog delay circuits coupled in series and to a fire input to receive a fire signal in succession. Each analog delay circuit receives the fire signal and, after a delay, provides the fire signal via an output to a corresponding fluid actuator. A bias circuit is coupled to each of the of analog delay circuits. The bias circuit provides a bias signal to control the delay.

A phase shifter for altering the phase of a radio frequency signal is disclosed herein. A Lange coupler is used having reflective ports that are coupled to artificial transmission lines. The artificial transmission lines provide a reflection transmission path, the length of which can be determined by digital control lines. Transistors placed along the length of the central trace provide independent paths to ground that serve to shorten the electrical length of the ATL. Accordingly, by selectively turning the transistors on/off, the electrical length of the ATL can be selected and thus the amount of phase delay introduced by the phase shifter.

A filter circuit includes a filter that is disposed on a path connecting a common terminal and an input output terminal and uses a first frequency band as a pass band, a filter that is disposed on a path connecting the common terminal and an input output terminal and uses a second frequency band different from the first frequency band as a pass band, and a phase adjustment circuit that has an input terminal connected to the path and an output terminal connected to the path, and adjusts a phase of a signal in the first frequency band input from the path and outputs a signal having a phase different from a phase of the signal in the first frequency band to the output terminal, wherein the path and the path are paths through which a received signal passes.

A phase shifter for altering the phase of a radio frequency signal is disclosed herein. A Lange coupler is used having reflective ports that are coupled to artificial transmission lines. The artificial transmission lines provide a reflection transmission path, the length of which can be determined by digital control lines. Transistors placed along the length of the central trace provide independent paths to ground that serve to shorten the electrical length of the ATL. Accordingly, by selectively turning the transistors on/off, the electrical length of the ATL can be selected and thus the amount of phase delay introduced by the phase shifter.

A delay cell includes: a plurality of delay elements coupled in series; and at least one three-phase inverter that is coupled in parallel to at least one of the delay elements, and that receives through a first control terminal a first bias voltage for compensating for a variation of a power source voltage, and receives through a second control terminal a second bias voltage for compensating for a variation of a ground voltage.