A power supply system includes a RF generator, a matching network, and a control module. The matching network includes at least one mechanically variable impedance element and at least one electrically variable impedance element. The control module is coupled to the matching network and configured to generate one or more signals to adjust at least one of an impedance of the mechanically variable impedance element or an impedance of the electrically variable impedance element to vary an impedance match between the generator and a load. In other examples, a hybrid variable impedance module includes at least one mechanically variable impedance element, at least one electrically variable impedance element, and a control module. The control module is configured to generate one or more signals to adjust at least one of an impedance of the mechanically variable impedance element or an impedance of the electrically variable impedance element.

A power supply system includes a RF generator, a matching network, and a control module. The matching network includes at least one mechanically variable impedance element and at least one electrically variable impedance element. The control module is coupled to the matching network and configured to generate one or more signals to adjust at least one of an impedance of the mechanically variable impedance element or an impedance of the electrically variable impedance element to vary an impedance match between the generator and a load. In other examples, a hybrid variable impedance module includes at least one mechanically variable impedance element, at least one electrically variable impedance element, and a control module. The control module is configured to generate one or more signals to adjust at least one of an impedance of the mechanically variable impedance element or an impedance of the electrically variable impedance element.

An impedance matching circuit includes a radiofrequency terminal and a series circuit connected to the radiofrequency terminal, wherein the series circuit comprises at least one reactance and at least one switching element having a drive input. A drive circuit is connected to the drive input and a coupler is connected to the drive circuit so as to an enable signal input. The impedance matching circuit enables short switching times and low losses in the at least one switching element.

An impedance matching circuit includes a radiofrequency terminal and a series circuit connected to the radiofrequency terminal, wherein the series circuit comprises at least one reactance and at least one switching element having a drive input. A drive circuit is connected to the drive input and a coupler is connected to the drive circuit so as to an enable signal input. The impedance matching circuit enables short switching times and low losses in the at least one switching element.

A circuit (100) for impedance transforming comprises a first port (P1), a second port (P2) and a tapped transformer (110) comprising a first winding (111) and a second winding (112). Each winding comprises a first terminal, a second terminal and a number of taps connected at different positions between the first and second terminals. The circuit (100) further comprises a first programmable capacitor (C1) connected in shunt with the first winding (111) and a second programmable capacitor (C2) connected in shunt with the second winding (112), a first set of switches (S1) connected between the number of taps on the first winding (111) and a terminal of the first port (P1), and a second set of switches (S2) connected between the number of taps on the second winding (112) and a terminal of the second port (P2). The circuit (100) is configured to transform impedance between a first circuit (120) connected to the first port (P1) and a second circuit (130) connected to the second port (P2) by selectively connecting the first circuit (120) to one of the taps on the first winding (111) via the first set of switches (S1) and selectively connecting the second circuit (112) to one of the taps on the second windings (112) via the second set of switches (S2).

A circuit (100) for impedance transforming comprises a first port (P1), a second port (P2) and a tapped transformer (110) comprising a first winding (111) and a second winding (112). Each winding comprises a first terminal, a second terminal and a number of taps connected at different positions between the first and second terminals. The circuit (100) further comprises a first programmable capacitor (C1) connected in shunt with the first winding (111) and a second programmable capacitor (C2) connected in shunt with the second winding (112), a first set of switches (S1) connected between the number of taps on the first winding (111) and a terminal of the first port (P1), and a second set of switches (S2) connected between the number of taps on the second winding (112) and a terminal of the second port (P2). The circuit (100) is configured to transform impedance between a first circuit (120) connected to the first port (P1) and a second circuit (130) connected to the second port (P2) by selectively connecting the first circuit (120) to one of the taps on the first winding (111) via the first set of switches (S1) and selectively connecting the second circuit (112) to one of the taps on the second windings (112) via the second set of switches (S2).

The present invention provides a transmitter including a first variable resistor, a first transistor, a second transistor, a third transistor and a fourth transistor is disclosed. The first variable resistor is coupled between a supply voltage and a first node. A first electrode of the first transistor is coupled to the first node, and a second electrode of the first transistor is coupled to a first output terminal of the transmitter. A first electrode of the second transistor is coupled to the first output terminal of the transmitter, and a second electrode of the second transistor is coupled to a second node. A first electrode of the third/fourth transistor is coupled to the first node, and a second electrode of the third/fourth transistor is coupled to a second output terminal of the transmitter.

The present invention provides a transmitter including a first variable resistor, a first transistor, a second transistor, a third transistor and a fourth transistor is disclosed. The first variable resistor is coupled between a supply voltage and a first node. A first electrode of the first transistor is coupled to the first node, and a second electrode of the first transistor is coupled to a first output terminal of the transmitter. A first electrode of the second transistor is coupled to the first output terminal of the transmitter, and a second electrode of the second transistor is coupled to a second node. A first electrode of the third/fourth transistor is coupled to the first node, and a second electrode of the third/fourth transistor is coupled to a second output terminal of the transmitter.

This disclosure describes systems, methods, and apparatuses for a two-stage solid state match having a load side and a source side; a first coarse stage and a second precision stage, wherein the first coarse stage is coupled between the second precision stage and the load side, and wherein the second precision stage is coupled between the source side and an input of the first coarse stage; the coarse first stage comprising at least one switched variable reactance element, wherein the coarse first stage is configured to map a load impedance connected to the load side to a first number of intermediate impedances at the input of the first coarse stage; and wherein the second precision stage is configured to map at least one of the intermediate impedances to a second number of input impedances at the source side.

This disclosure describes systems, methods, and apparatuses for a two-stage solid state match having a load side and a source side; a first coarse stage and a second precision stage, wherein the first coarse stage is coupled between the second precision stage and the load side, and wherein the second precision stage is coupled between the source side and an input of the first coarse stage; the coarse first stage comprising at least one switched variable reactance element, wherein the coarse first stage is configured to map a load impedance connected to the load side to a first number of intermediate impedances at the input of the first coarse stage; and wherein the second precision stage is configured to map at least one of the intermediate impedances to a second number of input impedances at the source side.