Two defense mechanisms, a hardware-based and software-based solution, are provided to protect a device during charging. The defenses randomly perturb the current drawn during charging thereby masking the unique patterns of the user's activities. It is shown that the two defenses force each one of the attacks to perform no better than random guessing, thus acting as effective defense mechanisms against all such types of attacks.

A circuit for realizing a precision and linear floating resistor, using MOSFET devices, is disclosed. A linear floating voltage-controlled resistor (LFVCR) is realized using a MOSFET with a gate drive means and a substrate drive means to provide a feedback of the common-mode voltage across the source-drain terminals to the gate and substrate terminals. Two such LFVCR circuits using matched MOSFET devices having independent substrates, along with an op-amp based negative feedback loop, are used to realize a continuously variable precision and linear floating resistor, whose value can be controlled by a combination of variable voltage, current, and resistor. Further embodiments are disclosed for realizing a resistor mirror circuit with multiple floating resistors, improving the linearity by using LFVCR circuits with complementary MOSFET devices, realizing a resistor with scaled-up resistance and extended voltage range, and realizing a resistor with scaled-down resistance and extended current range.

An electronic device includes a reference resistor, two first terminals between which the reference resistor is connected, and two second terminals between which a modified impedance value of the reference resistor is intended to be obtained. The electronic device also includes a first circuit that applies between the two second terminals a voltage substantially equal to that between the two first terminals, and a second circuit that flows between the two second terminals a second current the value of which corresponds to a fraction of a first current for flowing in the reference resistor between the two first terminals.

Certain implementations of the disclosed technology may include systems and methods for extending a frequency response of a transducer. A method is provided that can include receiving a measurement signal from a transducer, wherein the measurement signal includes distortion due to a resonant frequency of the transducer. The method includes applying a complementary filter to the measurement signal to produce a compensated signal, wherein applying the complementary filter reduces the distortion to less than about +/1 dB for frequencies ranging from about zero to about 60% or greater of the resonant frequency. The method further includes outputting the compensated signal.

A non-linear impedance terminates a transmission line. The non-linear impedance may be implemented with a back-to-back connected inverter pair. The pair acts as a non-linear resistor. A process, voltage, temperature (PVT) tracking circuit may also be provided to improve PVT tracking, with resistance of transistors locked to a calibrated resistor. The replica circuit does not appear in the signal path, and does not add capacitive load.

A pseudo resistor with tunable resistance including a first transistor and a second transistor is provided. The first transistor has a first terminal, a second terminal and a control terminal. The first terminal of the first transistor serves as a first terminal of the pseudo resistor. The control terminal of the first transistor receives a control voltage. The first transistor is controlled by the control voltage, such that the first transistor operates in a weak inversion region. The second transistor has a first terminal, a second terminal and a control terminal. The first terminal of the second transistor is coupled to the second terminal of the first transistor. The second terminal of the second transistor and the control terminal of the second transistor are coupled to each other to serve as a second terminal of the pseudo resistor with tunable resistance. The second transistor operates in the weak inversion region.

An electronically controllable resistor (ECR) designed for changing the resistance of a portion of a circuit comprises a voltage converter, a subtractor, an instrumental resistor (IR), and an executive element (EE) which can include at least one MOSFET or IGBT or a vacuum tube. There are a high-potential and two control voltage sources. The converter, which can use logarithmic amplifiers or be digital, is adapted to multiply the high-potential voltage by one of the control voltages and divide by another one. The resulting intermediate voltage is applied to the subtractor and compared therein with a voltage drop on the IR created by the current flowing through the IR and the EE. Thus, the ECR resistance can be regulated. The ECR makes it possible to achieve a wide range of resistance values, down to ultra-small values, while maintaining tolerance to destabilizing factors, including temperature. Also claimed is an ECR control circuit.

A tunable impedance simulator and impedance multiplier circuit and a system for configuring a second generation voltage-mode conveyor circuit (VCII) as the tunable impedance simulator and impedance multiplier are described. The tunable impedance simulator and impedance multiplier circuit includes one VCII having a positive input terminal connected to a voltage source, a negative input terminal connected to the voltage source, and an impedance terminal Z.sub.0 . The impedance terminal Z.sub.0 can be either positive or negative. When the impedance terminal Z.sub.0 is positive, a positive active inductor, a positive capacitance multiplier, and a positive resistance multiplier may be implemented. When the impedance terminal Z.sub.0 is negative, a negative active inductor, a negative capacitance simulator, and a negative resistance simulator may be implemented.

A resistive attenuator and a method for improving linearity of the resistive attenuator are provided. The resistive attenuator includes a first transistor, an attenuation circuit and a compensation circuit, wherein both the first transistor and the attenuation circuit are coupled between an input terminal and an output terminal of the resistive attenuator, and the compensation circuit is coupled to the first transistor. The first transistor is configured to provide a first signal path between the input terminal and the output terminal. The attenuation circuit is configured to provide a second signal path between the input terminal and the output terminal, wherein signal attenuation of the second signal path is greater than signal attenuation of the first signal path. The compensation circuit is configured to compensate nonlinear distortion caused by the first transistor.

A method and system of providing an active differential resistor. The active differential resistor includes a diode having a first node and a second node. There is a capacitor coupled in series between the first node of the diode and an input of the active differential resistor. There is a current source coupled across the first node and the second node of the diode and configured to forward bias the diode such that a Johnson-Nyquist noise of the active differential resistor is replaced by a shot noise.