A programmable impedance element consists of a plurality of nominally identical two-port elements, each two-port element having an impedance element and two switches, the two-port elements arranged in a chain fashion with a structured set of switches such that a range of impedances can be obtained from each cell by dynamically changing the connections between the impedance elements in the cell. The common cell is constructed by connecting the nominally identical two-port impedance elements in a way that the number of possible combinations of the impedance elements is reduced to the subset of all possible combinations that uses the minimum possible number of connections. This structure allows the creation of matched impedances using industry standard devices. The connections between impedance elements are switches that may be “field-programmable,” i.e., that may be set on the chip after manufacture and configured during operation of the circuit, or alternatively may be mask programmable.

A programmable impedance element consists of a plurality of nominally identical two-port elements, each two-port element having an impedance element and two switches, the two-port elements arranged in a chain fashion with a structured set of switches such that a range of impedances can be obtained from each cell by dynamically changing the connections between the impedance elements in the cell. The common cell is constructed by connecting the nominally identical two-port impedance elements in a way that the number of possible combinations of the impedance elements is reduced to the subset of all possible combinations that uses the minimum possible number of connections. This structure allows the creation of matched impedances using industry standard devices. The connections between impedance elements are switches that may be “field-programmable,” i.e., that may be set on the chip after manufacture and configured during operation of the circuit, or alternatively may be mask programmable.

A programmable impedance element consists of a plurality of nominally identical two-port elements, each two-port element having an impedance element and two switches, the two-port elements arranged in a chain fashion with a structured set of switches such that a range of impedances can be obtained from each cell by dynamically changing the connections between the impedance elements in the cell. The common cell is constructed by connecting the nominally identical two-port impedance elements in a way that the number of possible combinations of the impedance elements is reduced to the subset of all possible combinations that uses the minimum possible number of connections. This structure allows the creation of matched impedances using industry standard devices. The connections between impedance elements are switches that may be field-programmable, i.e., that may be set on the chip after manufacture and configured during operation of the circuit, or alternatively may be mask programmable.

An impedance adjusting circuit includes: a first node coupled to a resistor; a first impedance unit having an impedance value determined based on a first impedance code and coupled between a first voltage terminal and a second node; a first switching unit suitable for electrically connecting the first node and the second node to each other in response to a clock; a first average voltage unit suitable for generating an average voltage of the first node; a first comparison unit suitable for comparing the average voltage of the first node with a first reference voltage to produce a comparison result of the first comparison unit; and a first code generation unit suitable for generating the first impedance code in response to the comparison result of the first comparison unit.

A millimeter-wave, high GAMMA on-wafer load pull system uses a tuner with extended inclined slabline (bend-line) and a manually controlled low profile pre-matching module, mounted on the bent section of the slabline next to the wafer-probe. The pre-matching module uses a mobile sliding rack and a rotating tuning probe; the rack is mounted on the slabline extension and controlled by a fixed pinion. Both the rack and tuning probe position and immersion into the slabline are controlled using sidewise mounted easily accessible manual knobs. The low profile of the pre-matching module is a crucial feature and allows integration on the extended slabline of the tuner in immediate proximity of the wafer-probe, thus minimizing any additional insertion loss and maximizing tuning range. Manual handling of the pre-matching tuning module is easy and a pre-calibration allows efficient on-wafer load pull operations.

This disclosure relates to a system for mitigating distortion in a signal, including a plurality of bit-cells, a calculation circuit configured to determine a bit-cell population that is available to be activated for a given clock cycle, a dynamic element matching network configured to activate a subset of bit-cells of the bit-cell population, and a controller configured to control a pattern of activation of the subset of bit-cells of the bit-cell population.

This disclosure relates to a system for mitigating distortion in a signal, including a first calculation circuit configured to determine a bit-cell population available to be activated of a plurality of bit-cells based on a signal strength of an input signal, a second calculation circuit configured to determine a number of bit-cells to be activated based on the signal strength of the input signal, the number of bit-cells to be activated being less than or equal to the bit-cell population, a variable-width dynamic element matching network (variable DEM) configured to activate a first subset of bit-cells of the bit-cell population based on the number of bit-cells to be activated, and one or more fixed-width dynamic element matching networks (fixed DEMs) configured to activate a second subset of bit-cells of the bit-cell population based on the number of bit-cells to be activated.

In accordance with an example, an integrated circuit includes a linear combiner having an input for receiving a signal. The linear combiner also has a plurality of operator circuits for applying weighting factors to the signal, in which a first operator circuit in the plurality of operator circuits performs a first operation on the signal using a first sub-weight of one of the weighting factors to provide a first tile output and a second operator circuit in the plurality of operator circuits performs a second operation on the signal using a second sub-weight of the one of the weighting factors to provide a second tile output. The linear combiner also has an adder having a first input coupled to receive the first tile output and the second tile outputs and providing a combined output.

In accordance with an example, an integrated circuit includes a linear combiner having an input for receiving a signal. The linear combiner also has a plurality of operator circuits for applying weighting factors to the signal, in which a first operator circuit in the plurality of operator circuits performs a first operation on the signal using a first sub-weight of one of the weighting factors to provide a first tile output and a second operator circuit in the plurality of operator circuits performs a second operation on the signal using a second sub-weight of the one of the weighting factors to provide a second tile output. The linear combiner also has an adder having a first input coupled to receive the first tile output and the second tile outputs and providing a combined output.

A programmable impedance element consists of a plurality of nominally identical two-port elements, each two-port element having an impedance element and two switches, the two-port elements arranged in a chain fashion with a structured set of switches such that a range of impedances can be obtained from each cell by dynamically changing the connections between the impedance elements in the cell. The common cell is constructed by connecting the nominally identical two-port impedance elements in a way that the number of possible combinations of the impedance elements is reduced to the subset of all possible combinations that uses the minimum possible number of connections. This structure allows the creation of matched impedances using industry standard devices. The connections between impedance elements are switches that may be field-programmable, i.e., that may be set on the chip after manufacture and configured during operation of the circuit, or alternatively may be mask programmable.