A signal density modulation (SDM) encoder includes a first subtractor, a sigma circuit and a multi-bit quantizer. The first subtractor is used for receiving an input signal. The sigma circuit is coupled to the first subtractor. The multi-bit quantizer, coupled to the first subtractor and the sigma circuit, is configured to generate an output signal. The sigma circuit or the multi-bit quantizer produces a first feedback signal to the first subtractor. The first subtractor performs a subtraction operation according to the first feedback signal and the input signal, and generates a delta signal. The sigma circuit performs an operation on the delta signal, such that the SDM encoder has a noise transfer function having a high pass filtering effect. The noise transfer function is a ratio of a quantization error brought by the multi-bit quantizer with respect to the input signal. The output signal has more than two levels.

A digital filter and a method for filtering a pulse density modulation (PDM) signal are presented. The digital filter has a first filter circuit to receive an input signal with input values at successive time steps to provide a filtered input signal with filtered values at successive time steps. The digital filter does not require sample-rate or data format conversions. Also, the digital filter is area and power efficient when implemented in hardware. Optionally, the digital filter has a sigma-delta modulator including the quantiser, the sigma-delta modulator being used to receive the filtered input signal and to process the filtered input signal before and/or after being quantised by the quantiser. This digital filter does not require sample-rate or data format conversions. This digital filter is area and power efficient when implemented in hardware.

An analog-to-digital converter (ADC) includes a modulator configured to oversample an input signal generated from an output signal of a transducer; and a filter configured to perform a decimation operation on an output from the modulator and a frequency characteristics correction operation according to a filter control signal on the output from the modulator, wherein the frequency characteristics correction operation is performed to complement a frequency characteristics of the output signal of the transducer such that overall frequency characteristics of the transducer and the filter be flat in a signal band.

A digital filter and a method for filtering a pulse density modulation (PDM) signal are presented. The digital filter has a first filter circuit to receive an input signal with input values at successive time steps to provide a filtered input signal with filtered values at successive time steps. The digital filter does not require sample-rate or data format conversions. Also, the digital filter is area and power efficient when implemented in hardware. Optionally, the digital filter has a sigma-delta modulator including the quantiser, the sigma-delta modulator being used to receive the filtered input signal and to process the filtered input signal before and/or after being quantised by the quantiser. This digital filter does not require sample-rate or data format conversions. This digital filter is area and power efficient when implemented in hardware.

Various embodiments relate to delta-sigma loop filters with input feedforward. A delta-sigma loop filter may include a first integrator and a quantizer having an input coupled to an output of the first integrator. The delta-sigma loop filter may further include a first summing node having an output coupled to an input of the first integrator. Further, the delta-sigma loop filter may include a feedforward path from an input of the delta-sigma loop filter to a first input of the first summing node. The delta-sigma loop filter may also include a first feedback path from an output of the quantizer to a second input of the first summing node.

Various embodiments relate to an analog-to-digital converter (ADC). The ADC may include a first channel including a first delta-sigma loop filter and a second channel including a second delta-sigma loop filter. Each of the first delta-sigma loop filter and the second delta-sigma loop filter may include a first integrator and a quantizer having an input coupled to an output of the first integrator. Each of the first delta-sigma loop filter and the second delta-sigma loop filter may also include a first summing node having an output coupled to an input of the first integrator, and a feedforward path from an input of the delta sigma loop filter to a first input of the first summing node. Further, each of the first delta-sigma loop filter and the second delta-sigma loop filter may include a first feedback path from an output of the quantizer to a second input of the first summing node.

Most of the AC-DC converters have an analog control loop, which costs additional pins for the compensator, and there are limited options to change settings when, for example, the output voltage needs to change. This specification discloses systems and methods, where a delta-sigma ADC (analog-to-digital converter) is used to digitize the input voltage. The filter after the delta-sigma ADC can give a big delay, which reduces the phase margin of the control loop. To minimize the delay, this invention ensures that, when the setpoint is reached, the input of the delta-sigma modulator is in the middle of the input range. In some embodiments, a digital control loop can be implemented using a delta-sigma modulator together with a PI controller (proportional-integrator controller).

An analog-to-digital converter (ADC) includes a modulator configured to oversample an input signal generated from an output signal of a transducer; and a filter configured to perform a decimation operation on an output from the modulator and a frequency characteristics correction operation according to a filter control signal on the output from the modulator, wherein the frequency characteristics correction operation is performed to complement a frequency characteristics of the output signal of the transducer such that overall frequency characteristics of the transducer and the filter be flat in a signal band.

Various embodiments relate to delta-sigma loop filters with input feedforward. A delta-sigma loop filter may include a first integrator and a quantizer having an input coupled to an output of the first integrator. The delta-sigma loop filter may further include a first summing node having an output coupled to an input of the first integrator. Further, the delta-sigma loop filter may include a feedforward path from an input of the delta-sigma loop filter to a first input of the first summing node. The delta-sigma loop filter may also include a first feedback path from an output of the quantizer to a second input of the first summing node.

Various embodiments relate to an analog-to-digital converter (ADC). The ADC may include a first channel including a first delta-sigma loop filter and a second channel including a second delta-sigma loop filter. Each of the first delta-sigma loop filter and the second delta-sigma loop filter may include a first integrator and a quantizer having an input coupled to an output of the first integrator. Each of the first delta-sigma loop filter and the second delta-sigma loop filter may also include a first summing node having an output coupled to an input of the first integrator, and a feedforward path from an input of the delta-signal loop filter to a first input of the first summing node. Further, each of the first delta-sigma loop filter and the second delta-sigma loop filter may include a first feedback path from an output of the quantizer to a second input of the first summing node.