Methods and apparatus for a frequency selective limiter (FSL) having a magnetic material substrate that tapers in thickness and supports a transmission line that has segments and bends. The segments, which differ in width and are substantially parallel to each other, such that each segment traverses the substrate on a constant thickness of the substrate.

An all-pass filtering module of a common mode noise suppressing device includes first and second differential transmission circuits coupled to a reference node. Each of the first and second differential transmission circuits has an input terminal and an output terminal, and includes: first and second capacitive elements coupled in series between the input terminal and the output terminal; a first inductor coupled between the input terminal and the output terminal; and a third capacitive element and a second inductor coupled in series between the reference node and a common node between the first and second capacitive elements.

In an embodiment a low-pass filter arrangement has an input terminal for receiving an input voltage, a first voltage source coupled to the input terminal, a serial connection comprising a first and a second filter diode, the serial connection being coupled to the first voltage source, wherein a connection point between the first and the second filter diode is coupled to an output terminal of the filter arrangement, and a first filter capacitor coupled between the output terminal and a filter reference potential terminal. Therein the first voltage source is adapted to provide a first adjustable forward voltage whereby the first and the second filter diodes are both biased in a forward direction.

Methods and apparatus for a frequency selective limiter (FSL) having a magnetic material substrate that tapers in thickness and supports a transmission line that has segments and bends. The segments, which differ in width and are substantially parallel to each other, such that each segment traverses the substrate on a constant thickness of the substrate.

A radio frequency circuit includes a multilayer substrate, series arm circuits in a first path connecting the input/output terminals (T1 and T2) on the multilayer substrate, a parallel arm circuit in a second path connecting a node on the first path and a ground, a wiring A on the multilayer substrate connected to the input/output terminal (T1) as a part of the first path, a wiring B on the multilayer substrate connected to the input/output terminal (T2) as a part of the first path, and a wiring C on the multilayer substrate as a part of the second path. The parallel arm circuit includes an impedance variable circuit, the wiring A and the wiring B in a layer different from the multilayer substrate. When viewed in a plan view, the wiring C does not overlap with the wiring A and the wiring B.

A filter that includes a series circuit of a first Zener diode and a second Zener diode, a third Zener diode connected between a node and ground, and a third inductor. A first series resonant circuit is formed by a parasitic capacitance of the first Zener diode, a parasitic capacitance of the third Zener diode, and the third inductor, and a second series resonant circuit is formed by a parasitic capacitance of the second Zener diode, the parasitic capacitance of the third Zener diode, and the third inductor. Moreover, the parasitic capacitances of the first Zener diode and the second Zener diode are substantially equal, and the parasitic capacitance of the third Zener diode is larger than the parasitic capacitance of each of the first Zener diode and the second Zener diode.

A filter component having an ESD protection function that includes a mounting inductor component and a base board. An ESD protection element and a capacitor are formed in the base board, which includes a semiconductor substrate, and front and back rewiring layers. First and second mounting component connection terminal conductors to which the mounting inductor component is connected are formed on an outer surface of the front rewiring layer. Moreover, a first, second and third external connection terminal conductors are formed on an outer surface of the back rewiring layer. The ESD protection element is formed in the semiconductor substrate and the capacitor is formed in one of the front rewiring layer or the back rewiring layer.

In an embodiment a low-pass filter arrangement has an input terminal for receiving an input voltage, a first voltage source coupled to the input terminal, a serial connection comprising a first and a second filter diode, the serial connection being coupled to the first voltage source, wherein a connection point between the first and the second filter diode is coupled to an output terminal of the filter arrangement, and a first filter capacitor coupled between the output terminal and a filter reference potential terminal. Therein the first voltage source is adapted to provide a first adjustable forward voltage whereby the first and the second filter diodes are both biased in a forward direction.

Aspects of the invention provide for an electrostatic protection device for protecting an input port of an electronic circuit. The electrostatic protection device includes a stacked coil assembly with four ports. The electrostatic protection device further includes a human body model ESD protection circuit, a charge device model ESD protection circuit, and an impedance matching circuit. The human body model ESD protection circuit, the charge device model ESD protection circuit, and the impedance matching circuit are connected to separate ports selected from the four ports.

A radio frequency circuit includes a multilayer substrate, series arm circuits in a first path connecting the input/output terminals (T1 and T2) on the multilayer substrate, a parallel arm circuit in a second path connecting a node on the first path and a ground, a wiring A on the multilayer substrate connected to the input/output terminal (T1) as a part of the first path, a wiring B on the multilayer substrate connected to the input/output terminal (T2) as a part of the first path, and a wiring C on the multilayer substrate as a part of the second path. The parallel arm circuit includes an impedance variable circuit, the wiring A and the wiring B in a layer different from the multilayer substrate. When viewed in a plan view, the wiring C does not overlap with the wiring A and the wiring B.