A method of manufacturing an integrated circuit. This method includes forming an epitaxial material comprising single crystal piezo material overlying a surface region of a substrate to a desired thickness and forming a trench region to form an exposed portion of the surface region through a pattern provided in the epitaxial material. Also, the method includes forming a topside landing pad metal and a first electrode member overlying a portion of the epitaxial material and a second electrode member overlying the topside landing pad metal. Furthermore, the method can include processing the backside of the substrate to form a backside trench region exposing a backside of the epitaxial material and the landing pad metal and forming a backside resonator metal material overlying the backside of the epitaxial material to couple to the second electrode member overlying the topside landing pad metal.

A stacked filter package is disclosed. The stacked filter package can include a first acoustic wave device having a first device type. The first acoustic wave device includes a first substrate having a first coefficient of thermal expansion. The stacked filter package can include a second acoustic wave device having a second device type different from the first device type. The second acoustic wave device includes a second substrate having a second coefficient of thermal expansion. The second coefficient of thermal expansion is at least double the first coefficient of thermal expansion. The stacked filter package can include a bonding structure between the first and second substrates. The bonding structure couples the first and second substrate.

An acoustic wave device includes a piezoelectric substrate, a first interdigital transducer (IDT) electrode, reflectors on both sides of the first IDT electrode in a propagation direction of an acoustic wave, and a second IDT electrode facing the first IDT electrode with a reflector interposed therebetween. The first and second IDT electrodes include first and second intersecting areas in which electrode fingers overlap in the propagation direction. The first and second intersecting areas overlap in the propagation direction. A third busbar of the second IDT electrode is coupled to a first busbar of the first IDT electrode. A fourth busbar of the second IDT electrode is coupled to a ground potential. A resonant frequency of the second IDT electrode is in a frequency band of an interference wave signal.

A multiplexer includes first and second filters connected to a common terminal. The second filter has a pass band on a higher frequency side with respect to a pass band of the first filter. The first filter includes a series arm circuit, and a parallel arm circuit having a resonant frequency on a lower frequency side with respect to a frequency at a low frequency end of a pass band of the first filter, and the series arm circuit includes a series arm resonator having a resonant frequency in the pass band of the first filter and a series arm resonator that is electrically connected in parallel to the series arm resonator and that has a resonant frequency on a higher frequency side with respect to a frequency at a high frequency end of the pass band of the first filter.

A surface acoustic wave resonator includes first and second surface acoustic wave resonator connected in series, and a third surface acoustic wave resonator connected in series with the second surface acoustic wave resonator. Each of the first to third surface acoustic wave resonators includes a pair of comb-shaped electrodes in which electrode fingers of one of the comb-shaped electrodes and electrode fingers of the other one of the comb-shaped electrodes are alternately arranged. The second surface acoustic wave resonator has a lower ratio of a width of the electrode fingers to a pitch between the electrode fingers than the first and third surface acoustic wave resonators.

A device employing the generation and enhancement of surface acoustic waves on a highly doped p-type III-V semiconductor substrate (e.g., GaAs, GaSb, InAs, or InGaAs). The device includes two SiO.sub.2/ZnO islands, each including a SiO.sub.2 buffer layer deposited on the doped p-type III-V semiconductor substrate and a ZnO layer deposited on the SiO.sub.2 buffer layer. An input interdigital transducers (IDT) and an output IDT are each patterned on one of the SiO.sub.2/ZnO islands. The IDTs generates surface acoustic waves along an exposed surface of the highly doped p-type III-V semiconductor substrate. The surface acoustic waves improve the photoelectric and photovoltaic properties of the device. The device is manufactured using a disclosed technique for propagating strong surface acoustic waves on weak piezoelectric materials. Also disclosed is a photodetector developed using that technique.

A band elimination filter includes a plurality of parallel resonators, each including a piezoelectric substrate and an IDT electrode on a surface of the piezoelectric substrate. The IDT electrode includes a pair of comb-shaped electrodes opposing each other, and the IDT electrode includes electrode fingers, a pitch of the electrode fingers being different between an end portion of the IDT electrode in a propagation direction of an elastic wave and a central portion of the IDT electrode different from the end portion.

A filter includes a series-arm resonator connected on a path connecting input/output terminals, and first and second parallel-arm resonators connected between the same node on the path and ground. A resonant frequency of the second parallel-arm resonator is higher than a resonant frequency of the first parallel-arm resonator, and an anti-resonant frequency of the second parallel-arm resonator is higher than an anti-resonant frequency of the first parallel-arm resonator. Each of the first and second parallel-arm resonators includes an acoustic wave resonator including an IDT electrode. The IDT electrode in the second parallel-arm resonator has a higher duty ratio than the IDT electrode in the first parallel-arm resonator, where the duty ratio is the ratio of the width to the pitch of electrode fingers.

A method of manufacturing an integrated circuit. This method includes forming an epitaxial material comprising single crystal piezo material overlying a surface region of a substrate to a desired thickness and forming a trench region to form an exposed portion of the surface region through a pattern provided in the epitaxial material. Also, the method includes forming a topside landing pad metal and a first electrode member overlying a portion of the epitaxial material and a second electrode member overlying the topside landing pad metal. Furthermore, the method can include processing the backside of the substrate to form a backside trench region exposing a backside of the epitaxial material and the landing pad metal and forming a backside resonator metal material overlying the backside of the epitaxial material to couple to the second electrode member overlying the topside landing pad metal.

A method of manufacturing an integrated circuit. This method includes forming an epitaxial material comprising single crystal piezo material overlying a surface region of a substrate to a desired thickness and forming a trench region to form an exposed portion of the surface region through a pattern provided in the epitaxial material. Also, the method includes forming a topside landing pad metal and a first electrode member overlying a portion of the epitaxial material and a second electrode member overlying the topside landing pad metal. Furthermore, the method can include processing the backside of the substrate to form a backside trench region exposing a backside of the epitaxial material and the landing pad metal and forming a backside resonator metal material overlying the backside of the epitaxial material to couple to the second electrode member overlying the topside landing pad metal.