Patent classifications
H03K17/08108
FinFET thyristors for protecting high-speed communication interfaces
Fin field-effect transistor (FinFET) thyristors for protecting high-speed communication interfaces are provided. In certain embodiments herein, high voltage tolerant FinFET thyristors are provided for handling high stress current and high RF power handling capability while providing low capacitance to allow wide bandwidth operation. Thus, the FinFET thyristors can be used to provide electrical overstress protection for ICs fabricated using FinFET technologies, while addressing tight radio frequency design window and robustness. In certain implementations, the FinFET thyristors include a first thyristor, a FinFET triggering circuitry and a second thyristor that serves to provide bidirectional blocking voltage and overstress protection. The FinFET triggering circuitry also enhances turn-on speed of the thyristor and/or reduces total on-state resistance.
FINFET THYRISTORS WITH EMBEDDED TRANSISTOR CONTROL FOR PROTECTING HIGH-SPEED COMMUNICATION SYSTEMS
Fin field-effect transistor (FinFET) thyristors for protecting high-speed communication interfaces are provided. In certain embodiments herein, high voltage tolerant FinFET thyristors are provided for handling high stress current and high RF power handling capability while providing low capacitance to allow wide bandwidth operation. Thus, the FinFET thyristors can be used to provide electrical overstress protection for ICs fabricated using FinFET technologies, while addressing tight radio frequency design window and robustness. In certain implementations, the FinFET thyristors include a first thyristor, a FinFET triggering circuitry and a second thyristor that serves to provide bidirectional blocking voltage and overstress protection. The FinFET triggering circuitry also enhances turn-on speed of the thyristor and/or reduces total on-state resistance.
ELECTROSTATIC DISCHARGE PROTECTION USING A GUARD REGION
A silicon controlled rectifier (SCR) circuit is configured to shunt electrostatic discharge (ESD) current from a node to a reference voltage. The SCR circuit includes a first bipolar PNP transistor having a first emitter connected to the node, a first base, and a first collector. A second bipolar NPN transistor has a second collector sharing a first region with the first base, a second base sharing a second region with the first collector, and an emitter electrically connected to the reference voltage. A guard region is configured and arranged to delay triggering of the SCR circuit in response to an ESD event by impeding current flow in the second region.
SEMICONDUCTOR RELAY DEVICE
A semiconductor relay device includes a conversion circuit configured to receive an input signal from outside and pass a first current to a first node based on the input signal. A zener diode has an anode coupled to a second node and a cathode coupled to the first node. A resistor is coupled between the second node and a third node. A number n of diodes are serially coupled. A thyristor has an anode coupled to the first node, a cathode coupled to the second node, and a control terminal coupled to the third node. A transistor has a gate coupled to the first node. An anode of a diode at a first end of the n diodes is coupled to the first node, and a cathode of a diode at a second end of the n diodes is coupled to a third node.
FINFET THYRISTORS FOR PROTECTING HIGH-SPEED COMMUNICATION INTERFACES
Fin field-effect transistor (FinFET) thyristors for protecting high-speed communication interfaces are provided. In certain embodiments herein, high voltage tolerant FinFET thyristors are provided for handling high stress current and high RF power handling capability while providing low capacitance to allow wide bandwidth operation. Thus, the FinFET thyristors can be used to provide electrical overstress protection for ICs fabricated using FinFET technologies, while addressing tight radio frequency design window and robustness. In certain implementations, the FinFET thyristors include a first thyristor, a FinFET triggering circuitry and a second thyristor that serves to provide bidirectional blocking voltage and overstress protection. The FinFET triggering circuitry also enhances turn-on speed of the thyristor and/or reduces total on-state resistance.
SEMICONDUCTOR RELAY DEVICE
A semiconductor relay device includes a conversion circuit configured to receive an input signal from outside and pass a first current to a first node based on the input signal. A zener diode has an anode coupled to a second node and a cathode coupled to the first node. A resistor is coupled between the second node and a third node. A number n of diodes are serially coupled. A thyristor has an anode coupled to the first node, a cathode coupled to the second node, and a control terminal coupled to the third node. A transistor has a gate coupled to the first node. An anode of a diode at a first end of the n diodes is coupled to the first node, and a cathode of a diode at a second end of the n diodes is coupled to a third node.
Semiconductor relay device
A semiconductor relay device includes a conversion circuit configured to receive an input signal from outside and pass a first current to a first node based on the input signal. A zener diode has an anode coupled to a second node and a cathode coupled to the first node. A resistor is coupled between the second node and a third node. A number n of diodes are serially coupled. A thyristor has an anode coupled to the first node, a cathode coupled to the second node, and a control terminal coupled to the third node. A transistor has a gate coupled to the first node. An anode of a diode at a first end of the n diodes is coupled to the first node, and a cathode of a diode at a second end of the n diodes is coupled to a third node.
Semiconductor relay device
A semiconductor relay device includes a conversion circuit configured to receive an input signal from outside and pass a first current to a first node based on the input signal. A zener diode has an anode coupled to a second node and a cathode coupled to the first node. A resistor is coupled between the second node and a third node. A number n of diodes are serially coupled. A thyristor has an anode coupled to the first node, a cathode coupled to the second node, and a control terminal coupled to the third node. A transistor has a gate coupled to the first node. An anode of a diode at a first end of the n diodes is coupled to the first node, and a cathode of a diode at a second end of the n diodes is coupled to a third node.
SEMICONDUCTOR RELAY DEVICE
A semiconductor relay device includes a conversion circuit configured to receive an input signal from outside and pass a first current to a first node based on the input signal. A zener diode has an anode coupled to a second node and a cathode coupled to the first node. A resistor is coupled between the second node and a third node. A number n of diodes are serially coupled. A thyristor has an anode coupled to the first node, a cathode coupled to the second node, and a control terminal coupled to the third node. A transistor has a gate coupled to the first node. An anode of a diode at a first end of the n diodes is coupled to the first node, and a cathode of a diode at a second end of the n diodes is coupled to a third node.
CIRCUIT BREAKER LOCATOR AND TESTER
A circuit breaker locator/tester is made more effective and efficient by appropriately dealing with inherent temperature variations. During operation of the circuit breaker locator/tester, large amounts of current are pulsed through various components, resulting in significant heating effects. These pulses of large amounts of current are generated in relatively brief time periods. While components are designed to manage and deal with various heating effects, excessive heating can degrade performance and efficiency. Various monitoring devices and heat anticipation systems are included within the locator/tester to deal with these conditions. In certain embodiments, temperature monitoring components are included, which provides a clear indication of sensed temperatures at specific locations within the device. In addition, systems are also provided to concurrently monitor operation of the device and provide operational control so that undesirable operating conditions are not encountered. Using these operational monitoring systems, appropriate delays can be incorporated which will naturally allow for heat dissipation.