Disclosed is a transmitter which includes a channel driver that includes a pull-up transistor and a pull-down transistor connected between a power node and a ground node and outputs a voltage between the pull-up transistor and the pull-down transistor as a transmit signal, and a pre-driver that controls the pull-up transistor and the pull-down transistor in response to a driving signal and controls the channel driver such that the transmit signal is overshot at a rising edge of the driving signal and the transmit signal is undershot at a falling edge of the driving signal.

A signal transmitting and receiving apparatus including: a first on-die termination circuit connected to a first pin through which a first signal is transmitted or received and, when enabled, the first on-die termination circuit is configured to provide a first termination resistance to a signal line connected to the first pin; a second on-die termination circuit connected to a second pin through which a second signal is transmitted or received and, when enabled, the second on-die termination circuit is configured to provide a second termination resistance to a signal line connected to the second pin; and an on-die termination control circuit configured to independently control an enable time and a disable time of each of the first on-die termination circuit and the second on-die termination circuit.

A signal transmitting and receiving apparatus including: a first on-die termination circuit connected to a first pin through which a first signal is transmitted or received and, when enabled, the first on-die termination circuit is configured to provide a first termination resistance to a signal line connected to the first pin; a second on-die termination circuit connected to a second pin through which a second signal is transmitted or received and, when enabled, the second on-die termination circuit is configured to provide a second termination resistance to a signal line connected to the second pin; and an on-die termination control circuit configured to independently control an enable time and a disable time of each of the first on-die termination circuit and the second on-die termination circuit.

A signal transmitting and receiving apparatus including: a first on-die termination circuit connected to a first pin through which a first signal is transmitted or received and, when enabled, the first on-die termination circuit is configured to provide a first termination resistance to a signal line connected to the first pin; a second on-die termination circuit connected to a second pin through which a second signal is transmitted or received and, when enabled, the second on-die termination circuit is configured to provide a second termination resistance to a signal line connected to the second pin; and an on-die termination control circuit configured to independently control an enable time and a disable time of each of the first on-die termination circuit and the second on-die termination circuit.

A circuit includes first to third transistors. The first transistor includes a first terminal coupled to a first voltage, and a second terminal coupled to a connection. The second transistor includes a gate terminal coupled to the gate terminal of the first transistor, a first terminal coupled to a second voltage, and a second terminal coupled to the connection. The third transistor includes a first terminal coupled to the connection, a second terminal coupled to a node between the second terminals of the first and second transistors. The third transistor is controlled to be turned ON at a beginning of a first edge of a driving signal on the connection to pull a voltage of the driving signal on the first edge toward a threshold voltage, and be turned OFF in response to and after the voltage of the driving signal on the first edge reaching the threshold voltage.

Systems and methods for frequency reference generation are described. In an embodiment, a frequency reference circuit, includes: a bandgap proportional to temperature (PTAT) generator circuit that generates a bandgap PTAT current; a resistor complementary to temperature (CTAT) generator circuit that generates a resistor CTAT current; an adder that adds the PTAT current and the CTAT current to generate a constant current I.sub.cons; a switched-resistor (switched-R) circuit that receives the constant current I.sub.cons and a previously generated output clock and generates an output; a bandgap voltage reference generator circuit that generates a bandgap voltage V.sub.BG; an integrator circuit that receives the output of the switched-R circuit and the bandgap voltage V.sub.BG and generates an output; and a voltage-controlled oscillator (VCO) circuit that receives the output of the integrator circuit and generates a frequency reference.

A driver for a shared bus, such as a LIN bus, having a supply node (Vbat), a bus node (LIN), a transmit data input node (TX) and a receive data output node (RX), said driver comprising: a pull-up circuitry between the supply node and the bus node, driver circuitry (100) having a control input connected to the transmit data input node, feedback circuitry (200) configured to provide feedback from the shared bus to the control input of the driver circuitry; said feedback circuitry comprising copy circuitry (210) configured to obtain at least one copy signal representative for a signal on the bus node, filter circuitry (220) configured to low-pass filter the at least one copy signal, derivative circuitry (230) configured to obtain at least one derivative signal representative for the speed at which the signal on the bus node varies.

A circuit is disclosed. The circuit includes an output driver with a pull-up device, and a pull-down device. The circuit also includes a pre-driver, configured to generate a first signal for the pull-up device and to generate a second signal for the pull-down device, a first positive feedback circuit configured to increase the slew rate of the first signal in response to a transition in the second signal, and a second positive feedback circuit configured to increase the slew rate of the second signal in response to a transition in the first signal.

A communication device is disclosed. The disclosed communication device comprises: a transmission circuit for generating a transmission signal by using a first field effect transistor (FET) and a signal inputted from a first control circuit, and transmitting the transmission signal to a second control circuit; and a reception circuit for generating a reception signal by using a second field effect transistor (FET) and a signal received from the second control circuit, and outputting the reception signal to the first control circuit.

A signal transmitting and receiving apparatus including: a first on-die termination circuit connected to a first pin through which a first signal is transmitted or received and, when enabled, the first on-die termination circuit is configured to provide a first termination resistance to a signal line connected to the first pin; a second on-die termination circuit connected to a second pin through which a second signal is transmitted or received and, when enabled, the second on-die termination circuit is configured to provide a second termination resistance to a signal line connected to the second pin; and an on-die termination control circuit configured to independently control an enable time and a disable time of each of the first on-die termination circuit and the second on-die termination circuit.