A capacitively-driven tunable coupler includes a coupling capacitor connecting an open end of a quantum object (i.e., an end of the object that cannot have a DC path to a low-voltage rail, such as a ground node, without breaking the functionality of the object) to an RF SQUID having a Josephson element capable of providing variable inductance and therefore variable coupling to another quantum object.

Superconducting output amplifiers with interstage filters and related methods are described. An example superconducting output amplifier includes a first superconducting output amplifier stage and a second superconducting output amplifier stage. The superconducting output amplifier may further include a first terminal for receiving a first single flux quantum (SFQ) pulse train and coupling the SFQ pulse train to each of the first superconducting output amplifier stage and the second superconducting output amplifier stage. The superconducting output amplifier may further include an interstage filter comprising a damped Josephson junction (JJ) coupled between the first superconducting output amplifier stage and the second superconducting output amplifier stage, where the interstage filter is arranged to reduce distortion in an output voltage waveform generated by the superconducting output amplifier in response to at least the first SFQ pulse train.

One example includes a superconducting latch system. The system includes a first input stage configured to receive a first input pulse and a second input stage configured to receive a second input pulse. The system also includes a storage loop configured to switch from a first state to a second state in response to receiving the first input pulse, and to switch from the second state to the first state in response to the second input pulse. The first state corresponds to no flux in the storage loop and the second state corresponds to a flux in the storage loop. The system further includes an output stage configured to generate an output pulse in the second state of the storage loop.

Systems and methods for determining critical timing paths in a superconducting circuit design including Josephson junctions are provided. An example method includes providing timing information concerning a plurality of source terminals of at least one logic gate coupled with a first sink terminal of the at least one logic gate. The method further includes using a processor, determining whether, in view of the timing information, the first sink terminal is reachable by a single flux quantum (SFQ) pulse within a predetermined range of arrival time based on an assigned first phase to the at least one logic gate.

A quantum processor is operable as a universal adiabatic quantum computing system. The quantum processor includes physical qubits, with at least a first and second communicative coupling available between pairs of qubits via an in-situ tunable superconducting capacitive coupler and an in-situ tunable superconducting inductive coupler, respectively. Tunable couplers provide diagonal and off-diagonal coupling. Compound Josephson junctions (CJJs) of the tunable couplers are responsive to a flux bias to tune a sign and magnitude of a sum of a capacitance of a fixed capacitor and a tunable capacitance which is mediated across a pair of coupling capacitors. The qubits may be hybrid qubits, operable in a flux regime or a charge regime. Qubits may include a pair of CJJs that interrupt a loop of material and which are separated by an island of superconducting material which is voltage biased with respect to a qubit body.

A circuit can include a first Josephson junction (JJ), a second JJ, and a third JJ coupled in parallel using superconducting inductors. The first JJ, the second JJ, and the third JJ can be biased using one or more JJ-based current sources.

A single flux quantum (SFQ) circuit can include a combinational logic network, which can include a set of SFQ logic cells. The SFQ circuit can also include an SFQ sequencing circuit, which can be used to generate delayed versions of clock pulses to clock the set of SFQ logic cells.

A capacitively-driven tunable coupler includes a coupling capacitor connecting an open end of a quantum object (i.e., an end of the object that cannot have a DC path to a low-voltage rail, such as a ground node, without breaking the functionality of the object) to an RF SQUID having a Josephson element capable of providing variable inductance and therefore variable coupling to another quantum object.

Ring packet built-in self-test (PBIST) circuitry configured to detect errors in wires connecting a ring of superconducting chips includes circuitry configured to make the PBIST immune to interchip latency and still allow the PBIST to test a stop-to-stop connection. By making a PBIST independent of latency, an entire ring can be characterized for latency and for its bit-error rate prior to running any functional test. Such systems and associated methods can be scaled to larger platforms having any number of ring stops. The PBIST circuitry can function as either transmitter or receiver, or both, to test an entire ring. The PBIST can also be used to tune clocks in the ring to achieve the lowest overall bit error rate (BER) in the ring.

Ring packet built-in self-test (PBIST) circuitry configured to detect errors in wires connecting a ring of superconducting chips includes circuitry configured to make the PBIST immune to interchip latency and still allow the PBIST to test a stop-to-stop connection. By making a PBIST independent of latency, an entire ring can be characterized for latency and for its bit-error rate prior to running any functional test. Such systems and associated methods can be scaled to larger platforms having any number of ring stops. The PBIST circuitry can function as either transmitter or receiver, or both, to test an entire ring. The PBIST can also be used to tune clocks in the ring to achieve the lowest overall bit error rate (BER) in the ring.