A qubit system is provided wherein successive sets of M RF pulses are generated simultaneously, for application to qubit circuits in a plurality of N groups of M qubit circuits. M switching multiplexer circuits are used, each to pass a respective one of the M RF pulses in the set to a selected one of a plurality of N M to one RF combiners in a multiplexing mode. Combined RF pulses at M different RF frequencies are transmitted from each of the N combiners to a transmission structure for a respective one of the groups. Individual ones of the combined RF pulses are coupled from the transmission structure for the group to respective ones of the qubit circuits of the groups via respective frequency selective filters. In a broadcast mode the M switching multiplexer circuits are used to transmit the simultaneous pulses to all of RF combiners.

A logic gate with a neuron circuit which is used in electronic logic circuits, enables the arithmetic inputs to give output signal over the threshold value depending on a set threshold value according to the used AND, OR and MAJORITY logic gates, and enables to realize the logic processes by adjusting the triggering threshold value.

A circuit configured to transmit frequency multiplexed signals from a superconducting domain to a higher temperature domain. The circuit comprising a multiplexed signal output and a plurality of superconducting oscillator circuits each configured to output a different carrier frequency, each superconducting oscillator circuit comprising an oscillator output connected to the multiplexed signal output. Each superconducting oscillator circuit comprising a converter stage configured to convert an input of a superconducting logic signal to a Single Flux Quantum (SFQ) bit value, a splitter stage electrically connected to an output of the converter stage, the splitter stage configured to change between a first current state and a second current state based at least in part on the SFQ bit value, and an oscillator stage magnetically coupled to an output of the splitter stage and electrically coupled to the oscillator output. The oscillator stage comprising a direct current superconducting quantum interference device (DC SQUID).

A cryogenic memory cell and a memory device are provided. The cryogenic memory cell includes a spin moment transfer device. The spin moment transfer device converts a write current into a spin polarization current and changes a magnetic polarization direction under the action of the spin polarization current to achieve write storage of 0 and 1. The cryogenic memory cell also includes a nano-superconducting quantum interference device; a ground terminal of the nano-superconducting quantum interference device is in common-ground connection with a ground terminal of the spin moment transfer device, and the nano-superconducting quantum interference device undergoes a magnetic flux change under the action of a change in the magnetic polarization direction of the spin moment transfer device, thereby switching between a superconducting state and a non-superconducting state under a read current bias, to achieve read-out of 0 and 1.

One example includes a flux switch system. The system includes an input stage configured to provide an interrogation pulse. The system also includes a plurality of flux loops configured to receive an input current. Each of the flux loops includes a Josephson junction configured to trigger to generate an output pulse in response to a first polarity of the input current and to not trigger to generate no output pulse in response to a second polarity of the input current opposite the first polarity. The system further includes an output stage configured to propagate the output pulse to an output of the flux switch system.

Superconducting output amplifiers having return to zero to non-return to zero converters are described. An example superconducting output amplifier (OA) includes a first superconducting OA stage having a first DC-SQUID and a second DC-SQUID arranged in parallel to the first DC-SQUID. The superconducting OA includes an input terminal for receiving a single flux quantum (SFQ) pulse train. The superconducting OA includes a first splitter configured to split a first set of SFQ pulses corresponding to the SFQ pulse train into a first return to zero (RZ) signal and a second RZ signal. The superconducting OA includes a first return to zero to non-return to zero (RZ- NRZ) converter configured to convert the first RZ signal into a first non-return to zero (NRZ) signal for driving the first DC-SQUID, and a second RZ-NRZ converter configured to convert the second RZ signal into a second NRZ signal for driving the second DC-SQUID.

Superconducting output amplifiers (OAs) including compound direct current-superconducting quantum interference devices (DC-SQUIDS) having both inputs driven by an input signal having the same phase and related methods are described. An example superconducting OA includes: (1) a first compound DC-SQUID having a first DC-SQUID and a second DC-SQUID, and (2) a second compound DC-SQUID having a third DC-SQUID and a fourth DC-SQUID. The superconducting OA includes a first driver configured to receive a single flux quantum (SFQ) pulse train and amplify a first set of SFQ pulses associated with the SFQ pulse train to generate a first signal for driving the first DC-SQUID and the second DC-SQUID. The superconducting OA further includes a second driver configured to receive the SFQ pulse train and amplify a second set of SFQ pulses associated with the SFQ pulse train to generate a second signal for driving the third DC-SQUID and the fourth DC-SQUID.

Superconducting output amplifiers having return to zero to non-return to zero converters are described. An example superconducting output amplifier (OA) includes a first superconducting OA stage having a first DC-SQUID and a second DC-SQUID arranged in parallel to the first DC-SQUID. The superconducting OA includes an input terminal for receiving a single flux quantum (SFQ) pulse train. The superconducting OA includes a first splitter configured to split a first set of SFQ pulses corresponding to the SFQ pulse train into a first return to zero (RZ) signal and a second RZ signal. The superconducting OA includes a first return to zero to non-return to zero (RZ-NRZ) converter configured to convert the first RZ signal into a first non-return to zero (NRZ) signal for driving the first DC-SQUID, and a second RZ-NRZ converter configured to convert the second RZ signal into a second NRZ signal for driving the second DC-SQUID.

One example includes a memory circuit. The memory circuit includes a memory array in which contiguous rows of the memory array are organized as a write-bypass portion that comprises a first portion of the rows and a main memory portion that includes a remaining portion of the rows. A given data word is stored in each of a row in the write-bypass portion and another row in the main memory portion during a data write operation in response to word-write signals and bit-write signals associated with each of the respective plurality of contiguous columns. The circuit also includes a control logic configured to store data associated with storage locations of the given data word in each of the row in the write-bypass portion and the other row in the main memory portion to facilitate access of the given data word during a data read operation.

Devices and/or computer-implemented methods to facilitate a cross-resonance operation in a dispersive regime of a qubit frequency space are provided. According to an embodiment, a device can comprise a first qubit having a first operating frequency and a first anharmonicity. The device can further comprise a second qubit that couples to the first qubit to perform a cross-resonance operation. The second qubit having a second operating frequency and a second anharmonicity. A detuning between the first operating frequency and the second operating frequency is larger than the first anharmonicity and the second anharmonicity.