Systems and methods related to charge locking circuits and a control system for qubits are provided. A system for controlling qubit gates includes a first packaged device comprising a quantum device including a plurality of qubit gates, where the quantum device is configured to operate at a cryogenic temperature. The system further includes a second packaged device comprising a control circuit configured to operate at the cryogenic temperature, where the first packaged device is coupled to the second packaged device, and where the control circuit comprises a plurality of charge locking circuits, where each of the plurality of charge locking circuits is coupled to at least one qubit gate of the plurality of qubit gates via an interconnect such that each of the plurality of charge locking circuits is configured to provide a voltage signal to at least one qubit gate.

Systems and methods related to low power cryo-CMOS circuits with non-volatile threshold voltage offset compensation are provided. A system includes a plurality of devices configured to operate in a cryogenic environment, where a first distribution of a threshold voltage associated with the plurality of devices has a first value indicative of a measure of spread of the threshold voltage. The system further includes control logic, coupled to each of the plurality of devices, configured to modify a threshold voltage associated with each of the plurality of devices such that the first distribution is changed to a second distribution having a second value of the measure of spread of the threshold voltage representing a lower variation among threshold voltages of the plurality of devices.

Systems and methods are provided for coupling two qubits. A first persistent current qubit is fabricated with a first superconducting loop interrupted by a first Josephson junction isolated by a first inductor and a second inductor from a second Josephson junction. A second persistent current qubit is fabricated with a second superconducting loop interrupted by a third Josephson junction isolated by a third inductor and a fourth inductor from a fourth Josephson junction. Nodes defined by the Josephson junctions of the first qubit and their neighboring inductors are connected to corresponding nodes defined by the third Josephson junction and the third inductor via a first capacitor, with one pair of connections swapped such that the nodes are not connected to their respective corresponding nodes.

Systems and methods related to charge locking circuits and a control system for qubits are provided. A system for controlling qubit gates includes a first packaged device comprising a quantum device including a plurality of qubit gates, where the quantum device is configured to operate at a cryogenic temperature. The system further includes a second packaged device comprising a control circuit configured to operate at the cryogenic temperature, where the first packaged device is coupled to the second packaged device, and where the control circuit comprises a plurality of charge locking circuits, where each of the plurality of charge locking circuits is coupled to at least one qubit gate of the plurality of qubit gates via an interconnect such that each of the plurality of charge locking circuits is configured to provide a voltage signal to at least one qubit gate.

An electric circuit includes a plurality of superconducting components, each of the plurality of superconducting components having: a respective first terminal; a respective second terminal; and a respective input. The electric circuit further includes a bias current source electrically-connected to the respective first terminal of each of the plurality of superconducting components. The bias current source is configured to provide a bias current adapted to cause the electric circuit to function as a logical OR gate on the respective inputs of the plurality of superconducting components. The electric circuit further includes an output node adapted to output a state of the logical OR gate.

Systems and methods related to low power cryo-CMOS circuits with non-volatile threshold voltage offset compensation are provided. A system includes a plurality of devices configured to operate in a cryogenic environment, where a first distribution of a threshold voltage associated with the plurality of devices has a first value indicative of a measure of spread of the threshold voltage. The system further includes control logic, coupled to each of the plurality of devices, configured to modify a threshold voltage associated with each of the plurality of devices such that the first distribution is changed to a second distribution having a second value of the measure of spread of the threshold voltage representing a lower variation among threshold voltages of the plurality of devices.

An electric circuit includes one or more photon detector components and a superconducting logic gate component coupled to respective outputs of the one or more photon detector components. The electric circuit further includes a bias source electrically coupled to the superconducting logic gate component, the bias source configured to provide a bias current adapted to cause the superconducting logic gate component to function as a logical gate. The electric circuit also includes an optical switch component electrically coupled to an output of the superconducting logic gate component.

An electric circuit includes a plurality of superconducting components, each of the plurality of superconducting components having: a respective first terminal; a respective second terminal; and a respective input. The electric circuit further includes a bias current source electrically-connected to the respective first terminal of each of the plurality of superconducting components. The bias current source is configured to provide a bias current adapted to cause the electric circuit to function as a logical OR gate on the respective inputs of the plurality of superconducting components. The electric circuit further includes an output node adapted to output a state of the logical OR gate.

In a system including a cross-resonance gate having a superconducting control qubit and having a superconducting target qubit coupled through a bus resonator, echo pulses are generated at a first frequency and directed to the control qubit, wherein the first frequency is on resonance with the control qubit. Cross-resonance pulses are generated at a second frequency on resonance with the target qubit and applied to the control qubit, wherein the generating and applying the cross-resonance pulses induce rotations on the target qubit through an interaction that is mediated by the bus resonator. Cancellation pulses are generated at the second frequency and applied to the target qubit. Sets of Hamiltonian tomographies may be measured to determine appropriate amplitudes and phases of the cross-resonance and cancellation pulses.

Systems and methods related to charge locking circuits and a control system for qubits are provided. A system for controlling qubit gates includes a first packaged device comprising a quantum device including a plurality of qubit gates, where the quantum device is configured to operate at a cryogenic temperature. The system further includes a second packaged device comprising a control circuit configured to operate at the cryogenic temperature, where the first packaged device is coupled to the second packaged device, and where the control circuit comprises a plurality of charge locking circuits, where each of the plurality of charge locking circuits is coupled to at least one qubit gate of the plurality of qubit gates via an interconnect such that each of the plurality of charge locking circuits is configured to provide a voltage signal to at least one qubit gate.