The present disclosure provides a battery protection device and a chip therein. The chip includes a buffer circuit and a switch circuit. The buffer circuit is configured to generate a gate control signal according to a first logic control signal, a first voltage, a second voltage, and a third voltage. The switch circuit is configured to transmit the second or the third voltage to the buffer circuit. The switch circuit includes an invert circuit and a select circuit. The invert circuit is configured to invert a second logic control signal to a third logic control signal. The select circuit is configured to select the second or third voltage to transmit the same to the buffer circuit according to the second logic control signal and the third logic control signal. The gate control signal is configured to turn off a power transistor when an overcharging or an over-discharging occurs.

A method for monitoring an ideal diode comprises controlling a source-gate voltage of a MOSFET of the ideal diode such that the ideal diode can be changed between an off and an on state with a first target value for a source-drain voltage. To detect error states, the source-drain voltage and the source-gate voltage are measured. A check is carried out to determine whether the source-drain voltage reaches the first target value within predefined error limits in the on state. A test mode is carried out, in which a second target value which smaller than the first target value is set for the source-drain voltage. A check is carried out to determine whether the source-gate voltage reaches an upper threshold value when the test mode is being carried out. An error signal is output when the first target value and/or the upper threshold value is/are not reached.

A method comprises configuring a power converter to operate as a boost converter, the power converter comprising a low side switch and a high side switch, during a first dead time after turning off the low side switch and before turning on the high side switch, configuring the power converter such that a current of the power converter flows through a high speed diode, and after turning on the high side switch, configuring the power converter such that the current of the power converter flows through a low forward voltage drop diode.

The present description concerns a method of controlling a bidirectional switch (200), including: first (210 1) and (210 2) field-effect transistors electrically in series between first (262 1) and second (262 2) terminals of the bidirectional switch; third (614) and fourth (612) field-effect transistors electrically in series between said first and second terminals of the bidirectional switch, a first connection node (252) in series with the first and second transistors being common with a second connection node (616) in series with the third and fourth transistors, including steps of: receiving a voltage (V200) between the terminals of the bidirectional switch; detecting, from the received voltage, a first sign of said voltage; at least while the first sign is being detected, coupling the first terminal to said first node (252), potentials of control terminals of the first, second, third, and fourth transistors being referenced to the potential (REF) of the first and second nodes having common sources of the first, second, third, and fourth transistors connected thereto.

A field-effect transistor (FET) based synchronous rectifier for emulating a diode, comprising: a first terminal (20) and a second terminal (30); a first FET (M1) and a second ELT (M2), wherein the second FET (M2) is adapted to control operation of the first FET (M1) to thereby allow unidirectional current flow when the two terminals (20, 30) are connected with an external circuit; and wherein the FET based synchronous rectifier comprises a fully integrated single-chip device (10) adapted to emulate a diode.

A power supply system for USB Power Delivery includes a current source drive circuit to control a power FET to regulate the supply of power along a power path. The current source drive circuit includes a cascode current source and a cascode protection circuit formed by a source follower and a feedback voltage divider. The source follower can be a transistor with its gate connected to a cascode node between upper- and lower-stage transistors of the cascode current source. The divider node of the voltage divider is connected to the gate of the lower-stage transistor. The current source drive circuit can operate within the gate-source voltage specifications of 30-volt DEPMOS devices, and can provide high output impedance to the gate of power FET and a current limit circuit during current limiting operation, without requiring an extra high-voltage mask during fabrication.

One example described herein includes a power switch control system. The system includes a first monitoring terminal coupled to a first terminal of a power transistor and a second monitoring terminal coupled to a second terminal of the power transistor. The power transistor and the power switch control system can form an ideal diode between the first monitoring terminal arranged as an anode and the second monitoring terminal arranged as a cathode. The system further includes a reverse current controller coupled to the first monitoring terminal and the second monitoring terminal and is configured to control activation of the power transistor to conduct a reverse current from the second monitoring terminal to the first monitoring terminal in response to a reverse voltage arranged as a cathode voltage at the second monitoring terminal being greater than an anode voltage at the first monitoring terminal.

Provided is a switching circuit including an input terminal, a switching terminal, a ground terminal, a bootstrap terminal, a high side transistor connected to the input terminal and the switching terminal, a low side transistor connected to the switching terminal and the ground terminal, a bootstrap capacitor connected to the switching terminal and the bootstrap terminal, a bootstrap switch including a PMOS transistor, and a driver circuit that turns on the bootstrap switch in a period in which the low side transistor is on and that turns off the bootstrap switch in a period in which the low side transistor is off, in which the driver circuit includes a level shifter and a buffer, and the level shifter includes an output line, a first resistance, a first transistor, a second resistance, a third resistance, a second transistor, a third transistor, a first capacitor, and a fourth transistor.

An apparatus for driving a thyristor in an alternating-current power grid includes a non-isolated power supply circuit and a throttling circuit. One terminal of a power supply input of the non-isolated power supply circuit is connected to a first terminal of the thyristor. The other terminal of the power supply input is connected to another phase of the power supply relative to the first terminal or a neutral lead. The non-isolated power supply circuit forms a signal trigger loop through the throttling circuit, a second terminal of the thyristor and the first terminal of the thyristor. A control terminal of the throttling circuit is connected to a third terminal of the thyristor. The apparatus of the present invention has advantages of occupying a small space and having a simple circuit, a great instantaneous triggering current, a high cost effectiveness, and a low power consumption.

Various embodiments may relate to a synchronous rectifier including at least one rectifier cell, to which power is supplied via a secondary winding of a transformer arranged between the input connections of the synchronous rectifier. The rectifier cell comprises a bipolar main switch operated in the inverse mode, wherein an energy store is provided in the base line of the bipolar main switch, which energy store, in conjunction with an auxiliary switch which is concomitantly controlled by the relevant secondary winding for the bipolar main switch, ensures that the main switch is switched off prior to the end of the inverse phase.