A semiconductor device includes a temperature-independent current generator that generates a reference current substantially independent of temperature and a mirror current that is a substantial duplicate of the reference current, a pulse signal generator that samples the mirror current so as to generate a pulse signal, and a counter that obtains a number of pulse signals generated by the pulse signal generator, that permits the pulse signal generator to generate a pulse signal when it is determined thereby that the number of pulse signals obtained thereby is less than a predetermined threshold value, and that inhibits the pulse signal generator from generating a pulse signal when it is determined thereby that the number of pulse signals obtained thereby is equal to the predetermined threshold value. A method for monitoring a temperature of the semiconductor device is also disclosed.

A semiconductor device includes a temperature-independent current generator that generates a reference current substantially independent of temperature and a mirror current that is a substantial duplicate of the reference current, a pulse signal generator that samples the mirror current so as to generate a pulse signal, and a counter that obtains a number of pulse signals generated by the pulse signal generator, that permits the pulse signal generator to generate a pulse signal when it is determined thereby that the number of pulse signals obtained thereby is less than a predetermined threshold value, and that inhibits the pulse signal generator from generating a pulse signal when it is determined thereby that the number of pulse signals obtained thereby is equal to the predetermined threshold value. A method for monitoring a temperature of the semiconductor device is also disclosed.

In an integrated circuit, a first current source is coupled between a first supply voltage and a first node. An output stage includes a first current steering PMOS transistor coupled to the first node, a first current steering NMOS transistor including a first current electrode coupled to the first current steering PMOS transistor at a second node, a second current steering PMOS coupled to the first node, and a second current steering NMOS transistor including a first current electrode coupled to the second current steering PMOS transistor at a third node. Voltage at the second node is used to drive a gate of the second current steering PMOS transistor, and voltage at the third node is used to drive a gate of the first current steering PMOS transistor. First and second programmable slew rate pre-drivers provide outputs to the gates of the first and second current steering NMOS transistors, respectively.

In an integrated circuit, a first current source is coupled between a first supply voltage and a first node. An output stage includes a first current steering PMOS transistor coupled to the first node, a first current steering NMOS transistor including a first current electrode coupled to the first current steering PMOS transistor at a second node, a second current steering PMOS coupled to the first node, and a second current steering NMOS transistor including a first current electrode coupled to the second current steering PMOS transistor at a third node. Voltage at the second node is used to drive a gate of the second current steering PMOS transistor, and voltage at the third node is used to drive a gate of the first current steering PMOS transistor. First and second programmable slew rate pre-drivers provide outputs to the gates of the first and second current steering NMOS transistors, respectively.

A signal generator includes a first voltage generator, a second voltage generator, an operational amplifier, and an oscillator. The first voltage generator generates a first voltage, and the second voltage generator generates a second voltage. The operational amplifier generates an amplified error signal based on the first voltage and the second voltage, and the oscillator generates a periodic signal based on the amplified error signal. The first voltage generator and the second voltage generator are configured to generate their respective voltages based on the periodic signal. As a result, frequency deviation in the periodic signal may be corrected, for example, without increasing the source current of the oscillator or the gain of the operational amplifier. Also, improved phase noise performance may also be achieved through an increase in loop gain.

A signal generator includes a first voltage generator, a second voltage generator, an operational amplifier, and an oscillator. The first voltage generator generates a first voltage, and the second voltage generator generates a second voltage. The operational amplifier generates an amplified error signal based on the first voltage and the second voltage, and the oscillator generates a periodic signal based on the amplified error signal. The first voltage generator and the second voltage generator are configured to generate their respective voltages based on the periodic signal. As a result, frequency deviation in the periodic signal may be corrected, for example, without increasing the source current of the oscillator or the gain of the operational amplifier. Also, improved phase noise performance may also be achieved through an increase in loop gain.

A semiconductor circuit includes a first pad, a second pad, swapping circuit, and an internal circuit. The internal circuit receives a first external signal and a second external signal, and generates a first internal signal and a second internal signal. Based on master information and swapping information, the swapping circuit couples the internal circuit to one of first and second pads to provide a path through which the first internal signal is output and a path through which the first external signal is received, and couples the internal circuit to the other of the first and second pads to provide a path through which the second internal signal is output and a path through which the second external signal is received.

A semiconductor circuit includes a first pad, a second pad, swapping circuit, and an internal circuit. The internal circuit receives a first external signal and a second external signal, and generates a first internal signal and a second internal signal. Based on master information and swapping information, the swapping circuit couples the internal circuit to one of first and second pads to provide a path through which the first internal signal is output and a path through which the first external signal is received, and couples the internal circuit to the other of the first and second pads to provide a path through which the second internal signal is output and a path through which the second external signal is received.

A circuit with a metal-oxide semiconductor field-effect transistor and a diode module is applied to a power factor correction circuit, which can effectively reduce the heat generated by the whole system under heavy load, The circuit includes a metal-oxide semiconductor field-effect transistor and a diode module and a load determination unit. The diode module includes a plurality of diodes with a switch. The load determination unit can control the connection/disconnection of each diode in the diode module based on the magnitude of the load current. It can effectively reduce the current generated by each diode due to the load, thereby reducing the heat generation of the overall system. Moreover, due to the contact capacitance effect after the diodes are connected in parallel, the electromagnetic interference (EMI) characteristics of the power factor correction circuit of the system can be further optimized.

A circuit with a metal-oxide semiconductor field-effect transistor and a diode module is applied to a power factor correction circuit, which can effectively reduce the heat generated by the whole system under heavy load, The circuit includes a metal-oxide semiconductor field-effect transistor and a diode module and a load determination unit. The diode module includes a plurality of diodes with a switch. The load determination unit can control the connection/disconnection of each diode in the diode module based on the magnitude of the load current. It can effectively reduce the current generated by each diode due to the load, thereby reducing the heat generation of the overall system. Moreover, due to the contact capacitance effect after the diodes are connected in parallel, the electromagnetic interference (EMI) characteristics of the power factor correction circuit of the system can be further optimized.