The present invention provides a voltage multiplier system for an electrical device. The system includes a multi-vibrator adapted to generate a clock signal, and a voltage-multiplier module. Further, the multi-vibrator includes a pair of transistors, and at least one resistor-capacitor module. Further, the at least one resistor-capacitor module is connected between the emitter terminal and a base terminal of each of the pair of transistors to limit voltage between the base terminal and the emitter terminal of each of the pair of transistors. The voltage-multiplier module is adapted to boost an input voltage based on the clock signal received from the multi-vibrator.

A circuit for an oscillator with common-mode resonance includes a first oscillator circuit and a second oscillator circuit coupled to the first oscillator circuit. Each of the first oscillator circuit or the second oscillator circuit includes a tank circuit, a cross-coupled transistor pair, and one or more capacitors. The tank circuit is formed by coupling a first inductor with a pair of first capacitors. The cross-coupled transistor pair is coupled to the tank circuit, and one or more second capacitors are coupled to the tank circuit and the cross-coupled transistor pair. Each of the first oscillator circuit or the second oscillator circuit allows tuning of a respective common mode (CM) resonance frequency (F.sub.CM) to be at twice a respective differential resonance frequency (F.sub.D).

The specification discloses a flashing lamp circuit including (1) at least one LED, (2) a dual-BJT astable multivibrator, and (3) a BJT/MOSFET pair that functions as both (a) a switch between the multivibrator and the lamp and (b) a current regulator for the at least one LED.

A high voltage pulse generator for electro-poration comprising: a capacitor bank in which the electric charge used to generate the pulses is stored; the capacitor bank has an output terminal on which a high voltage direct current HT is present; a voltage amplifier circuit which receives, at input, the high voltage direct current HT and is provided with an automatic gain control circuit designed to compare a reference voltage V.sub.HT-ref with the voltage supplied at output V.sub.OUT by the amplifier to maintain the voltage constant at output during generation of the pulses; a current amplifier circuit arranged downstream of the voltage amplifier circuit and provided with an electronic semiconductor switch communicating with a first terminal with the output of the capacitor bank and provided with a second terminal designed to communicate with an output of the pulse generator; the voltage present at the output of the voltage amplifier is supplied to the output of the pulse generator and is used to operate the switching during closing of the electronic semiconductor switch.

The specification discloses a flashing lamp circuit including (1) at least one LED, (2) a dual-BJT astable multivibrator, and (3) a BJT/MOSFET pair that functions as both (a) a switch between the multivibrator and the lamp and (b) a current regulator for the at least one LED.

A circuit for power transmission through a single conductive element. The circuit includes an oscillator, a single conductive element, and a load. The oscillator is configured to generate a periodic voltage. The single conductive element is connected in series with the oscillator. The load is connected in series with the single conductive element. The load includes a first diode, a first resistor, and a first inductor. The first diode is connected in series with the single conductive element. The first resistor is connected in series with the first diode. The first inductor is connected between the first diode and the single conductive element. The first inductor is connected in series with the first resistor.

An oscillating circuit includes an input terminal and an output terminal, to both of which an oscillator is coupled, a DC cut capacitor having one terminal of two terminals that is coupled to the input terminal, an inverter having an input side coupled to the other terminal of the DC cut capacitor and an output side coupled to the output terminal, a first feedback resistor coupled in parallel to the inverter, a second feedback resistor coupled in parallel to the DC cut capacitor and the inverter, and a switch coupled in parallel to the DC cut capacitor.

A differential Colpitts oscillator circuit is described which provides a larger tuning range, has better phase noise and uses less power than conventional differential Colpitts oscillator circuits. The circuit is characterized by a capacitive ladder in which only variable capacitor is used for tuning the circuit. In some embodiments, a variable capacitor can be used for fine tuning.

Embodiments relate to a circuit including a first circuit branch, a second circuit branch, and an integrator circuit. The first branch includes a first transistor and a first current source to generate a first CTAT voltage signal that includes components corresponding to parasitic base and emitter resistances of the first transistor. The second branch includes a second transistor and a second current source to generate a second CTAT voltage signal that includes components corresponding to parasitic base and emitter resistances of the second transistor. The first and second circuit branches are coupled to the integrator circuit such that the integrator circuit integrates a difference between the first and second CTAT voltage signals such that the integrated signal does not include any components corresponding to parasitic base and emitter resistances.

A semiconductor device capable of reducing in size thereof and suppressing degradation in the characteristics of circuit components is provided. The semiconductor device includes an LC circuit comprised of a spiral inductor provided over a semiconductor substrate and a capacitive element coupled with the spiral inductor. The spiral inductor includes a central area encircled with a metal wiring and a peripheral area other than the central area. The capacitive element is formed in an upper-layer or a lower-layer position corresponding to the peripheral area other than the central area.