Method and electronic device for the pulse-modulated actuation of a load in a vehicle, a period duration (T.sub.PM) of a frequency (f.sub.PM) of the pulse modulation being able to be divided into an integer number (N) of sections (T.sub.STEP), the duration of each of which corresponds to a multiple of a period duration (T.sub.OSC) of a clock signal, and the method having the steps of: calculating a frequency (f.sub.PM+1, f.sub.PM) or period duration (T.sub.PM+1, T.sub.PM) of a period of the pulse modulation on the basis of underlying frequency modulation, and determining the duration of a respective section (T.sub.STEP) of a period duration (T.sub.PM) of the pulse modulation using the calculated frequency (f.sub.PM+1, f.sub.PM) or period duration (T.sub.PM+1, T.sub.PM) of a period of the pulse modulation.

Method and electronic device for the pulse-modulated actuation of a load in a vehicle, a period duration (T.sub.PM) of a frequency (f.sub.PM) of the pulse modulation being able to be divided into an integer number (N) of sections (T.sub.STEP), the duration of each of which corresponds to a multiple of a period duration (T.sub.OSC) of a clock signal, and the method having the steps of: calculating a frequency (f.sub.PM+1, f.sub.PM) or period duration (T.sub.PM+1, T.sub.PM) of a period of the pulse modulation on the basis of underlying frequency modulation, and determining the duration of a respective section (T.sub.STEP) of a period duration (T.sub.PM) of the pulse modulation using the calculated frequency (f.sub.PM+1, f.sub.PM) or period duration (T.sub.PM+1, T.sub.PM) of a period of the pulse modulation.

A sigma delta (SD) pulse-width modulation (PWM) loop includes a loop filter implementing a linear transfer function to generate a loop filter signal, wherein the loop filter is configured to receive an input signal and a first feedback signal and generate the loop filter signal based on the input signal, the first feedback signal, and the linear transfer function; and a hysteresis comparator coupled to an output of the loop filter, the hysteresis comparator configured to receive the loop filter signal and generate a sigma delta PWM signal based on the loop filter signal, wherein the first feedback signal is derived from the sigma delta PWM signal.

A sigma delta (SD) pulse-width modulation (PWM) loop includes a loop filter implementing a linear transfer function to generate a loop filter signal, wherein the loop filter is configured to receive an input signal and a first feedback signal and generate the loop filter signal based on the input signal, the first feedback signal, and the linear transfer function; and a hysteresis comparator coupled to an output of the loop filter, the hysteresis comparator configured to receive the loop filter signal and generate a sigma delta PWM signal based on the loop filter signal, wherein the first feedback signal is derived from the sigma delta PWM signal.

A control method includes sequentially updating a next cycle pulse width modulation command for each of an upper switch and lower switch of a phase leg of a power converter according to an order defined by timing of a rising edge of the next cycle pulse width command for one of the switches relative to a rising edge of a previous cycle pulse width command for the one of the switches.

A control method includes sequentially updating a next cycle pulse width modulation command for each of an upper switch and lower switch of a phase leg of a power converter according to an order defined by timing of a rising edge of the next cycle pulse width command for one of the switches relative to a rising edge of a previous cycle pulse width command for the one of the switches.

This application relates an activity detector (100) for detecting signal activity in an input audio signal (S.sub.IN), such as may be used for always-on speech detection. The activity detector has a first time-encoding modulator (TEM) 101 including a first hysteretic comparator (201) for generating a PWM (pulse-width modulation) signal based on the input audio signal. A second TEM (103) having a second hysteretic comparator (401) is arranged to receive a reference voltage (V.sub.MID) and generate a clock signal (S.sub.CLK). A time-decoding converter (102) receives the clock signal and generates count values of a number of cycles of the clock signal in periods defined by the PWM signal. An activity monitor (104) is responsive to a count signal (S.sub.CT) from the TDC 102 to determine whether the input audio signal comprises signal activity above a defined threshold.

This application relates an activity detector (100) for detecting signal activity in an input audio signal (S.sub.IN), such as may be used for always-on speech detection. The activity detector has a first time-encoding modulator (TEM) 101 including a first hysteretic comparator (201) for generating a PWM (pulse-width modulation) signal based on the input audio signal. A second TEM (103) having a second hysteretic comparator (401) is arranged to receive a reference voltage (V.sub.MID) and generate a clock signal (S.sub.CLK). A time-decoding converter (102) receives the clock signal and generates count values of a number of cycles of the clock signal in periods defined by the PWM signal. An activity monitor (104) is responsive to a count signal (S.sub.CT) from the TDC 102 to determine whether the input audio signal comprises signal activity above a defined threshold.

In described examples of a ramp circuit, a first terminal of a capacitor is coupled to a ramp terminal and a second capacitor terminal is coupled to a return terminal. A charge source has an input terminal coupled to a supply terminal and a charge output terminal. A resistor has a first terminal coupled to the return terminal. A first switch is coupled between the ramp terminal and a second terminal of the resistor. A second switch is coupled between the charge output terminal and the ramp terminal.

An optical receiver device includes a boost converter circuit, an optical receiver circuit, and a pulse width modulation controller circuitry. The boost converter circuit is configured to convert a supply voltage according to a pulse width modulation signal, in order to generate an output voltage. The optical receiver circuit is configured to set a gain according to the output voltage, in order to convert an optical signal to a data signal according to the gain. The pulse width modulation controller circuitry is configured to perform a digital to analog conversion according to a control code to gradually adjust a current associated with the output voltage, and to compare the output voltage with a reference voltage to generate the pulse width modulation signal.