A digital isolator can include: an encoding circuit configured to receive an input digital signal, and to encode a rising edge and a falling edge of the input digital signal into different encoded signals; an isolating element coupled to the encoding circuit, and being configured to transmit the encoded signal in an electrical isolation manner; and a decoding circuit configured to receive the encoded signal through the isolating element, and to decode the encoded signal to obtain the rising edge and the falling edge, in order to output an output digital signal consistent with the input digital signal.

A digital isolator can include: an encoding circuit configured to receive an input digital signal, and to encode a rising edge and a falling edge of the input digital signal into different encoded signals; an isolating element coupled to the encoding circuit, and being configured to transmit the encoded signal in an electrical isolation manner; and a decoding circuit configured to receive the encoded signal through the isolating element, and to decode the encoded signal to obtain the rising edge and the falling edge, in order to output an output digital signal consistent with the input digital signal.

A signal modulator for modulating at least one input signal is disclosed. The modulator includes an adaptive ramp generator receiving a clock signal having a clock cycle. The adaptive ramp generator provides a ramp signal having a profile starting from a minimum level adjusted in each clock cycle. The signal modulator may receive a first, second, and third input signal, and a clock signal. The first and second input signals may derive from a single signal where the second signal is equal to the first signal shifted by 180 degrees. The third signal may be a fixed level that sets the nominal duty cycle of the modulator. The input signal having the highest amplitude among the first, second, and third input signals is identified. The minimum level of the ramp signal is adjusted, and the peak value of the ramp maintained substantially equal to the signal having the highest amplitude.

A signal modulator for modulating at least one input signal is disclosed. The modulator includes an adaptive ramp generator receiving a clock signal having a clock cycle. The adaptive ramp generator provides a ramp signal having a profile starting from a minimum level adjusted in each clock cycle. The signal modulator may receive a first, second, and third input signal, and a clock signal. The first and second input signals may derive from a single signal where the second signal is equal to the first signal shifted by 180 degrees. The third signal may be a fixed level that sets the nominal duty cycle of the modulator. The input signal having the highest amplitude among the first, second, and third input signals is identified. The minimum level of the ramp signal is adjusted, and the peak value of the ramp maintained substantially equal to the signal having the highest amplitude.

A signal modulator for modulating at least one input signal is disclosed. The modulator includes an adaptive ramp generator receiving a clock signal having a clock cycle. The adaptive ramp generator provides a ramp signal having a profile starting from a minimum level adjusted in each clock cycle. The signal modulator may receive a first, second, and third input signal, and a clock signal. The first and second input signals may derive from a single signal where the second signal is equal to the first signal shifted by 180 degrees,. The third signal may be a fixed level that sets the nominal duty cycle of the modulator. The input signal having the highest amplitude among the first, second, and third input signals is identified. The minimum level of the ramp signal is adjusted, and the peak value of the ramp maintained substantially equal to the signal having the highest amplitude.

A signal modulator for modulating at least one input signal is disclosed. The modulator includes an adaptive ramp generator receiving a clock signal having a clock cycle. The adaptive ramp generator provides a ramp signal having a profile starting from a minimum level adjusted in each clock cycle. The signal modulator may receive a first, second, and third input signal, and a clock signal. The first and second input signals may derive from a single signal where the second signal is equal to the first signal shifted by 180 degrees,. The third signal may be a fixed level that sets the nominal duty cycle of the modulator. The input signal having the highest amplitude among the first, second, and third input signals is identified. The minimum level of the ramp signal is adjusted, and the peak value of the ramp maintained substantially equal to the signal having the highest amplitude.

Multi-user superposition transmissions (MUSTs) on non-aligned resources are described. A base station may schedule a transmission to an enhancement layer user equipment (UE) and a base layer UE. The transmission may include a base layer that spans a base layer resource set and an enhancement layer that spans an enhancement layer resource set, where the resource sets may be aligned or un-aligned. The base station may use a combined constellation to map symbols to the base layer resource set for communication with the enhancement layer and base layer UEs over overlapping portions of the resource sets, and an extended constellation to map symbols to an extended set of resources for which the enhancement layer resource set is exclusive of the base layer resource set. The extended constellation may be based on an extended modulation order determined based on a base modulation order and an enhancement modulation order.

Multi-user superposition transmissions (MUSTs) on non-aligned resources are described. A base station may schedule a transmission to an enhancement layer user equipment (UE) and a base layer UE. The transmission may include a base layer that spans a base layer resource set and an enhancement layer that spans an enhancement layer resource set, where the resource sets may be aligned or un-aligned. The base station may use a combined constellation to map symbols to the base layer resource set for communication with the enhancement layer and base layer UEs over overlapping portions of the resource sets, and an extended constellation to map symbols to an extended set of resources for which the enhancement layer resource set is exclusive of the base layer resource set. The extended constellation may be based on an extended modulation order determined based on a base modulation order and an enhancement modulation order.

A system and method is provided including a first pulse width modulation (PWM) generator circuit including a first timer to generate a first cycle count, a first configuration register to define characteristics of a first electrical pulse to be generated, and a trigger cycle count specifying a timing of a first trigger signal, and a first load enable input to load a new configuration value into the first configuration register, a second PWM generator circuit including a second timer to generate a second cycle count, a second configuration register to define characteristics of a second electrical pulse to be generated, a second load enable input to load a new configuration value into the second configuration register, and a load enable selector to selectively drive the second load enable input based on the first trigger signal.

A system and method is provided including a first pulse width modulation (PWM) generator circuit including a first timer to generate a first cycle count, a first configuration register to define characteristics of a first electrical pulse to be generated, and a trigger cycle count specifying a timing of a first trigger signal, and a first load enable input to load a new configuration value into the first configuration register, a second PWM generator circuit including a second timer to generate a second cycle count, a second configuration register to define characteristics of a second electrical pulse to be generated, a second load enable input to load a new configuration value into the second configuration register, and a load enable selector to selectively drive the second load enable input based on the first trigger signal.