A system and method for phase and gain calibration of a current sensor system. The system comprises a microcontroller configured to execute software in an energy measurement component and a calibration computer having a calibration application. The energy measurement component receives first and second digital signals representing current and voltage signals, respectively, received from a test source, and calculates active power and a power factor, and provides those values to the calibration computer. The power factor is converted to a converted phase angle. Based on the information received from the energy measurement component, the calibration application calculates parameters used to update components within the microcontroller to maximize the accuracy of the current sensor system.

Disclosed is a circuit which includes a first amplifier that generates a first output signal by comparing a ramp signal and a reset signal of a pixel signal output from a pixel array in a first operating period and comparing the ramp signal and an image signal of the pixel signal output from the pixel array in a second operating period, a second amplifier that generates a second output signal based on the first output signal, and a counter. During at least one operating period of the first operating period and the second operating period, the first output signal controls a first source current of the first amplifier, or the second output signal controls at least one of the first source current of the first amplifier and a second source current of the second amplifier.

Disclosed is a circuit which includes a first amplifier that generates a first output signal by comparing a ramp signal and a reset signal of a pixel signal output from a pixel array in a first operating period and comparing the ramp signal and an image signal of the pixel signal output from the pixel array in a second operating period, a second amplifier that generates a second output signal based on the first output signal, and a counter. During at least one operating period of the first operating period and the second operating period, the first output signal controls a first source current of the first amplifier, or the second output signal controls at least one of the first source current of the first amplifier and a second source current of the second amplifier.

There is provided an imaging device including a pixel array section including pixel units two-dimensionally arranged in a matrix pattern, each pixel unit including a photoelectric converter, and a plurality of column signal lines disposed according to a first column of the pixel units. The imaging device further includes an analog to digital converter that is shared by the plurality of column signal lines.

The present disclosure provides an analog-to-digital converter system comprising a sampler configured to sample an input signal and provide at least two output signals with a predetermined output sample rate, and an analog-to-digital converter for each one of the output signals and configured to convert the respective output signal into a digital signal with a predetermined converter sample rate, wherein the converter sample rate is higher than the output sample rate. Further, the present disclosure provides a respective method.

The present technology relates to a comparator that can easily modify operating point potential of the comparator, and an imaging device. A pixel signal output from a pixel, and, a reference signal with changeable voltage are input to a differential pair. A current mirror connected to the differential pair, and a voltage drop mechanism allowed to cause a predetermined voltage drop is connected between a transistor that configures the differential pair, and a transistor that configures the current mirror. A switch is connected in parallel to the voltage drop mechanism. The present technology can be applied, for example, to an image sensor that captures an image.

It is an object of the present technology to provide an image sensor capable of reducing crosstalk in an AD conversion unit. The image sensor includes: capacitors in an even-numbered column region; and a capacitor in an odd-numbered column region disposed facing the capacitors in the even-numbered column region with different areas.

An AD conversion circuit provided in a solid-state image sensor includes a counter circuit that performs count processing and a first latch circuit that holds at least one of a discrimination result of a first comparison circuit and a first output result of the counter circuit.

A semiconductor device includes a signal conversion circuit configured to convert a sensing current provided from a sensing element into a sensing voltage; an analog-to-digital converter (ADC) configured to convert the sensing voltage to a digital value; and a driving circuit configured to drive a light emitting element, wherein the ADC generates a digital value corresponding to proximity to an object by performing a primary operation comparing a ramp signal varying with time and the sensing voltage while the light emitting element is not driven and a secondary operation comparing the ramp signal and the sensing voltage while the light emitting element is driven.

A method for removing offset in a receiver of an integrated circuit (IC) includes: determining digital codes of differential input voltages of an amplifier in a first receiving lane of the receiver; comparing the digital codes to a digital code corresponding to an optimum common mode voltage (VCM) of the receiver; according to the comparison, determining a bias code for adjusting both the differential input voltages to match the optimum VCM; and inputting the bias code to a bias circuit of the receiver. The first receiving lane of the receiver includes a plurality of amplifiers. The method steps are repeated for each amplifier of the plurality of amplifiers, and then repeated for all receiving lanes of the IC.