Patent classifications
H03M1/282
Suppressing spurious signals in direct-digital synthesizers
A technique for generating analog waveforms includes combining a desired, in-band signal with a randomizing, out-of-band signal at an input of a DAC, operating the DAC to generate DAC output based on a combination of the desired signal and the randomizing signal, and filtering the DAC output to pass the desired signal while removing the randomizing signal.
DUAL MEASUREMENT DISPLACEMENT SENSING TECHNIQUE
A method for determining a length of a span of electrically conductive material, comprising a first voltage measurement across the entire span, and a second voltage measurement across a constant-length segment of the span. The dual measurements allow the calculation of the span length in a manner that is robust to many disturbances including ambient temperature, material temperature, and material stress and fatigue.
High-Speed Successive Approximation Analog-to-Digital Converter of Two Bits per Circle
The present invention pertains to a high-speed successive approximation analog-to-digital converter of two bits per circle, includes three switches, two capacitor arrays, three comparators, an encoding circuit, a first switch array corresponding to the first capacitor array, a second switch array corresponding to the second capacitor array, a shifting register and a digital correction unit. The analog-to-digital converter, featuring doubled speed, realizes a successive approximation process without any fault when a high-bit large capacitor is unsettled. Thus no redundancy bit capacitor is required to compensate for unsettled pre-stage large capacitor. By using the encoding circuit, a thermometer code is converted into a binary code effectively, and inherent errors of comparators are reduced by the randomization of three comparators.
METHOD AND DEVICE FOR SYNCHRONIZATION OF LARGE-SCALE SYSTEMS WITH MULTIPLE TIME INTERLEAVING SUB-SYSTEMS
A multi-instance time-interleaving (TI) system and method of operation therefor. The system includes a plurality of TI devices, each with a plurality of clock generation units (CGUs) coupled to an interleaver network. Within each TI device, the plurality of CGUs provides a plurality of clock signals needed by the interleaver network. A phase detector device is coupled to the plurality of TI devices and configured to determine any phase differences between the clock signals of a designated reference TI device and the corresponding clock signals of each other TI device. To determine the phase differences, the phase detector can use a logic comparator configuration, a time-to-digital converter (TDC) configuration, or an auto-correlation configuration. The phases of the clock signals of each other TI device can be aligned to the reference TI device using internal phase control, retimers, delay cells, finite state machines, or the like.
Phase detector devices and corresponding time-interleaving systems
A multi-instance time-interleaving (TI) system and method of operation therefor. The system includes a plurality of TI devices, each with a plurality of clock generation units (CGUs) coupled to an interleaver network. Within each TI device, the plurality of CGUs provides a plurality of clock signals needed by the interleaver network. A phase detector device is coupled to the plurality of TI devices and configured to determine any phase differences between the clock signals of a designated reference TI device and the corresponding clock signals of each other TI device. To determine the phase differences, the phase detector can use a logic comparator configuration, a time-to-digital converter (TDC) configuration, or an auto-correlation configuration. The phases of the clock signals of each other TI device can be aligned to the reference TI device using internal phase control, retimers, delay cells, finite state machines, or the like.
Method and device for synchronization of large-scale systems with multiple time interleaving sub-systems
A multi-instance time-interleaving (TI) system and method of operation therefor. The system includes a plurality of TI devices, each with a plurality of clock generation units (CGUs) coupled to an interleaver network. Within each TI device, the plurality of CGUs provides a plurality of clock signals needed by the interleaver network. A phase detector device is coupled to the plurality of TI devices and configured to determine any phase differences between the clock signals of a designated reference TI device and the corresponding clock signals of each other TI device. To determine the phase differences, the phase detector can use a logic comparator configuration, a time-to-digital converter (TDC) configuration, or an auto-correlation configuration. The phases of the clock signals of each other TI device can be aligned to the reference TI device using internal phase control, retimers, delay cells, finite state machines, or the like.
Laser control in scanners
An example device including a laser source for generating a laser pulse, a scanner for mounting the laser source, and a motion detector for detecting a motion of the scanner when the laser pulse scans an object. The motion detector includes an optical sensor for generating an optical signal based on the motion of the scanner, and a controller. The controller determines a movement of the scanner and disables the laser source when the scanner ceases to move.
LASER CONTROL IN SCANNERS
An example device including a laser source for generating a laser pulse, a scanner for mounting the laser source, and a motion detector for detecting a motion of the scanner when the laser pulse scans an object. The motion detector includes an optical sensor for generating an optical signal based on the motion of the scanner, and a controller. The controller determines a movement of the scanner and disables the laser source when the scanner ceases to move.
Dual measurement displacement sensing technique
A method for determining a length of a span of electrically conductive material, comprising a first voltage measurement across the entire span, and a second voltage measurement across a constant-length segment of the span. The dual measurements allow the calculation of the span length in a manner that is robust to many disturbances including ambient temperature, material temperature, and material stress and fatigue.
Encode Inputs to Reduce Energy Usages in Analog Computation Acceleration
A device having: memory cells configured to store a set of first parameters as an input for an operation of multiplication and accumulation; digital to analog converters; an analog section of the operation of multiplication and accumulation; analog to digital converters; and a controller configured to analyze the set of first parameters to identify an encoding parameter for reduced energy consumption in processing the input. The device generates, using the digital to analog converters and according to the set of first parameters, analog inputs to the analog section of the operation of multiplication and accumulation. The analog section generates analog outputs responsive to the analog input. The device determines, using the analog to digital converters and according to the encoding parameter and the analog outputs, a set of second parameters as an output responsive to the input for the operation of multiplication and accumulation.