Patent classifications
H03M1/665
Suppressing spurious signals in direct-digital synthesizers
A technique for generating analog waveforms includes combining a desired, in-band signal with a randomizing, out-of-band signal at an input of a DAC, operating the DAC to generate DAC output based on a combination of the desired signal and the randomizing signal, and filtering the DAC output to pass the desired signal while removing the randomizing signal.
INDUCTIVE CURRENT DIGITAL-TO-ANALOG CONVERTER (DAC) AND RELATED CONTROL OPTIONS
An inductive current digital-to-analog converter (DAC) includes: a power supply input adapted to be coupled to a power supply; a load terminal adapted to be coupled to a load; an inductor between the power supply input and the load terminal; and inductor current control circuitry. The inductor current control circuitry has: a sense signal input configured to receive a sense signal representative of the inductor current; a control code input configured to receive a control code; a set of switches having respective control terminals; and a set of control circuit outputs coupled to the respective control terminals of the set of switches. The inductor current control circuitry is configured to adjust control signals provided to the set of control circuit outputs based on the sense signal and the control code.
Apparatus and method for conversion between analog and digital domains with a time stamp
An apparatus and method are disclosed with some embodiments including an analog and time to digital converter (ATDC) including a receiver, the receiver for receiving an analog channel input for conversion to a digital data, the digital data having at least one bit, and a defined absolute reference time stamp, the defined absolute reference time stamp representing an absolute reference time associated with conversion of the analog channel input to the digital data and an analog-to-digital converter, the converter converting the analog channel input to the digital data.
APPARATUS AND METHOD FOR CONVERSION BETWEEN ANALOG AND DIGITAL DOMAINS WITH A TIME STAMP
An apparatus and method are disclosed with some embodiments including an analog and time to digital converter (ATDC) including a receiver, the receiver for receiving an analog channel input for conversion to a digital data, the digital data having at least one bit, and a defined absolute reference time stamp, the defined absolute reference time stamp representing an absolute reference time associated with conversion of the analog channel input to the digital data and an analog-to-digital converter, the converter converting the analog channel input to the digital data.
Digital RF-DAC
An RF-DAC transmitter is provided that includes an in-phase channel, a quadrature-phase channel, a first intermediate-phase channel, and a second intermediate-phase channel. Each channel includes a pair of interleaved RF-DACs for producing a pair of interleaved RF signals and a subtractor.
Signed-RFDAC architectures enabling wideband and efficient 5G transmitters
A radio frequency digital-to-analog converter (RFDAC) circuit includes an RFDAC array circuit including an array of cells arranged into a plurality of segments. Each segment of the plurality of segments is configured to process input data signals. The RFDAC array circuit is configured to process an input data based on activating a set of segments of the plurality of segments, forming a set of active segments, and when the sign of the input data is changed, deactivate a partially active segment of the set of active segments and activate a sign change segment within the RFDAC array circuit. The sign change segment includes a segment within the plurality of segments of the RFDAC array circuit that is different from the set of active segments.
APPARATUS AND METHOD FOR CONVERSION BETWEEN ANALOG AND DIGITAL DOMAINS WITH A TIME STAMP
An apparatus and method are disclosed with some embodiments including an analog and time to digital converter (ATDC) including a receiver, the receiver for receiving an analog channel input for conversion to a digital data, the digital data having at least one bit, and a defined absolute reference time stamp, the defined absolute reference time stamp representing an absolute reference time associated with conversion of the analog channel input to the digital data and an analog-to-digital converter, the converter converting the analog channel input to the digital data.
RECONFIGURABLE TRANSMIT DIGITAL-TO-ANALOG CONVERTER (DAC) CIRCUIT
Methods and apparatus for sharing digital-to-analog (DAC) converters in a reconfigurable DAC circuit to support two or more transmit chains of a wireless transmitter configured for different radio access technologies (RATs) and/or different transmitter architectures. One example DAC circuit generally includes at least four DACs and a plurality of switches coupled to outputs of the at least four DACs such that the DAC circuit is configured as a multi-channel DAC circuit with at least four channels for a first set of one or more frequency bands and as an interleaved DAC circuit with at least two channels for a second set of one or more frequency bands different from the first set of frequency bands.
Inductive current digital-to-analog converter (DAC) and related control options
An inductive current digital-to-analog converter (DAC) includes: a power supply input adapted to be coupled to a power supply; a load terminal adapted to be coupled to a load; an inductor between the power supply input and the load terminal; and inductor current control circuitry. The inductor current control circuitry has: a sense signal input configured to receive a sense signal representative of the inductor current; a control code input configured to receive a control code; a set of switches having respective control terminals; and a set of control circuit outputs coupled to the respective control terminals of the set of switches. The inductor current control circuitry is configured to adjust control signals provided to the set of control circuit outputs based on the sense signal and the control code.
Phase shifter
The disclosure relates to a phase shifter having a first mode of operation and a second mode of operation, the phase shifter comprising a mixer stage configured to mix an oscillator signal with an analog signal to provide a phase shifted signal, switching circuitry and a controller arranged to provide the analog signal to the mixer stage as a voltage in the first mode of operation and as a current in the second mode of operation.