In accordance with the present invention a system and method for calibration of the current steering DAC is elaborated which helps to reduce design complexity and reduce silicon area required in the design. Present invention is utilising a clocked comparator and plurality of switch transistors 405,305 and AUX DAC in conjunction with digital estimator and digital compensator blocks to estimate the errors in the current sources 406 and compensate the errors using same AUX DAC during normal operation mode.

Methods and apparatus for adaptively generating a reference voltage (V.sub.REF) for biasing a switch driver and corresponding switch in a digital-to-analog converter (DAC). The adaptive biasing scheme may be capable of tracking process, voltage, and temperature (PVT) of the DAC. An example DAC generally includes a plurality of DAC cells, each DAC cell comprising a current source, a switch coupled in series with the current source, and a switch driver coupled to a control input of the switch, the switch driver being configured to receive power from a first power supply rail referenced to a reference potential node; a regulation circuit comprising a first transistor coupled between the reference potential node for the DAC and the switch driver in at least one of the plurality of DAC cells; and a V.sub.REF generation circuit coupled to the regulation circuit and configured to adaptively generate a V.sub.REF for the regulation circuit.

Methods and apparatus for adaptively generating a reference voltage (V.sub.REF) for biasing a switch driver and corresponding switch in a digital-to-analog converter (DAC). The adaptive biasing scheme may be capable of tracking process, voltage, and temperature (PVT) of the DAC. An example DAC generally includes a plurality of DAC cells, each DAC cell comprising a current source, a switch coupled in series with the current source, and a switch driver coupled to a control input of the switch, the switch driver being configured to receive power from a first power supply rail referenced to a reference potential node; a regulation circuit comprising a first transistor coupled between the reference potential node for the DAC and the switch driver in at least one of the plurality of DAC cells; and a V.sub.REF generation circuit coupled to the regulation circuit and configured to adaptively generate a V.sub.REF for the regulation circuit.

A digital-to-analog conversion circuit includes a first digital-to-analog converter (DAC) and a second DAC. The first DAC includes a first current generation circuit (CGC) and a first current-to-voltage converter. The first CGC generates a first current based on a first digital code received through a first terminal to provide the first current to an output node. The second DAC includes a second CGC and a second current-to-voltage converter. The second CGC generates a second current based on a second digital code received through a second input terminal to provide the second current to the output node. The first current-to-voltage converter and the second current-to-voltage converter convert a sum of the first current and the second current to a an analog voltage corresponding to a sum of the first digital code and the second digital code, and output the analog voltage at the output node.

A number of unit cells of a digital-to-analog converter (DAC) may be simultaneously activated to generate an analog signal. However, while each unit cell may be generally the same, there may be variations such as non-linearity or noise in the analog output depending on which unit cells are activated for a given digital signal value. For example, as additional unit cells are activated for increased values of the analog signal, the fill order in which the unit cells are activated may affect the linearity/noise of the DAC. The decision units may be programmable to select which branches of the fractal DAC to activate, changing the fill order based on a fill-selection signal. The fill order may be set by a fill controller via the fill-selection signal to account for manufacturing variations, gradients in the supply voltage, output line routing, and/or environmental factors such as temperature.

A number of unit cells of a digital-to-analog converter (DAC) may be simultaneously activated to generate an analog signal. However, while each unit cell may be generally the same, there may be variations such as non-linearity or noise in the analog output depending on which unit cells are activated for a given digital signal value. For example, as additional unit cells are activated for increased values of the analog signal, the fill order in which the unit cells are activated may affect the linearity/noise of the DAC. The decision units may be programmable to select which branches of the fractal DAC to activate, changing the fill order based on a fill-selection signal. The fill order may be set by a fill controller via the fill-selection signal to account for manufacturing variations, gradients in the supply voltage, output line routing, and/or environmental factors such as temperature.

Certain aspects of the present disclosure provide a digital-to-analog converter (DAC) system. The DAC system generally includes a plurality of current steering cells, each comprising a current source coupled to at least two current steering switches, wherein control inputs of the at least two current steering switches are coupled to an input path of the DAC system. The DAC system may also include a current source toggle circuit configured to selectively disable the current source of at least one of the plurality of current steering cells, and a feedforward path coupled between the input path and at least one control input of the current source toggle circuit.

A digital-to-analog converter includes a current cell array including a plurality of current cells, each current cell of the plurality of current cells being configured to generate a current of a same magnitude; a first pattern connecting first current cells, among the plurality of current cells, arranged along a diagonal line of the current cell array; a second pattern connecting second current cells, among the plurality of current cells, arranged along a first oblique line parallel to the diagonal line; and a third pattern connecting third current cells, among the plurality of current cells, arranged along a second oblique line parallel to the diagonal line, the third pattern being electrically connected to the second pattern, wherein the diagonal line is between the first oblique line and the second oblique line.

Provided is a DA converter for outputting an analog signal according to an input digital signal, including a plurality of current output units to be input with the digital signal, which output a current according to the digital signal to a corresponding wiring, a conversion unit provided with a plurality of feedback paths respectively coupled to wirings corresponding to the current output units, and which selects at least one wiring among the wirings corresponding to the current output units and output an analog signal according to a current flowing in the selected wiring, and a first noise reduction unit provided with a plurality of first switches each of which switches whether to electrically connect to at least one wiring among the wirings corresponding to the current output units, and reduces a noise component generated in at least one of the plurality of current output units from the electrically coupled wiring.

An inductive current digital-to-analog converter (DAC) includes: a power supply input adapted to be coupled to a power supply; a load terminal adapted to be coupled to a load; an inductor between the power supply input and the load terminal; and inductor current control circuitry. The inductor current control circuitry has: a sense signal input configured to receive a sense signal representative of the inductor current; a control code input configured to receive a control code; a set of switches having respective control terminals; and a set of control circuit outputs coupled to the respective control terminals of the set of switches. The inductor current control circuitry is configured to adjust control signals provided to the set of control circuit outputs based on the sense signal and the control code.