A syndrome calculation circuit includes a matrix product calculation circuit. The matrix product calculation circuit is configured to generate syndrome bits in a composite field by calculating a matrix product of input data bits and a first arithmetic matrix. The first arithmetic matrix is a matrix product of a basis conversion matrix for converting a data string from a Galois field to the composite field and a second arithmetic matrix, which is at least a part of a parity check matrix.

There is provided a method for generating a burst error correction code. The method comprises: setting a mother code; defining a syndrome set corresponding to each burst error pattern for at least two burst error patterns to be corrected based on the mother code; shortening a column of a PCM (parity check matrix) of the mother code so that the defined syndrome sets are relatively prime; and designing an error correction code for the each burst error pattern based on an optimal generator polynomial maximizing a length of the shortened code within a range of a length of a parity bit of the mother code or a syndrome vector included in the syndrome set that is relatively prime.

A syndrome calculation circuit includes a matrix product calculation circuit. The matrix product calculation circuit is configured to generate syndrome bits in a composite field by calculating a matrix product of input data bits and a first arithmetic matrix. The first arithmetic matrix is a matrix product of a basis conversion matrix for converting a data string from a Galois field to the composite field and a second arithmetic matrix, which is at least a part of a parity check matrix.

A syndrome calculation circuit includes a matrix product calculation circuit. The matrix product calculation circuit is configured to generate syndrome bits in a composite field by calculating a matrix product of input data bits and a first arithmetic matrix. The first arithmetic matrix is a matrix product of a basis conversion matrix for converting a data string from a Galois field to the composite field and a second arithmetic matrix, which is at least a part of a parity check matrix.

Encoding bits with a Q-ary linear error correction code defined over a binary-extension Galois field GF(2k), defined by a quasi-cyclic parity-check matrix comprising: first, second and third circulant sub-matrices comprising respective circulants respectively having first, second and third shifts and defined by first, second and third parameters belonging to the Galois field GF(2k), the second shift equal to a difference between a number of rows of each circulant and the first shift. A first set of parity-check bits is determined according to a fourth circulant having a shift equal to a difference between the number of rows and the first and third shifts and defined by the multiplicative inverse of a product between the first and third parameters, and to the second and third circulant sub-matrices. A second set of parity-check bits is determined according to the first set of parity-check bits and the first and second circulant sub-matrices.

A method for encoding information bits with a Q-ary linear error correction code defined over a binary-extension Galois field GF(2.sup.k), and defined by a quasi-cyclic parity-check matrix comprising: first, second and third circulant sub-matrices respectively comprising first, second and third circulants respectively having first, second and third shifts and being defined respectively by first, second and third parameters belonging to the Galois field GF(2.sup.k), said second parameter being the inverse of the first parameter, and the second shift being equal to a difference between a number of rows of each circulant and the first shift. The method comprises determining: a first set of parity-check bits according to a fourth circulant having a fourth shift equal to a difference between said number of rows and said first and third shifts and being defined by the multiplicative inverse of a fourth parameter given by a product between the first and third parameters, and to the second and third circulant sub-matrices, and a second set of parity-check bits according to the determined first set of parity-check bits and said first and second circulant sub-matrices.

A method for generating an interleaved polar code is provided and including: performing a channel selection algorithm on message bits to generate an interleaved polar sequence; and performing interleaved encoding on the message bits to generate an interleaved polar code according to the interleaved polar sequence. The process performed at each encoding stage includes an interleaving process and a polar process.

A solution is proposed for processing data bits, in which the data bits are transformed into first data bytes by means of a first transformation, in which the first data bytes are stored in a memory, in which second data bytes are read from the memory, in which each of the second data bytes, when there is no error, is a codeword of a block error code and in which one error signal per second data byte is determined that indicates whether or not this second data byte is a codeword.

A solution is proposed for processing data bits, in which the data bits are transformed into first data bytes by means of a first transformation, in which the first data bytes are stored in a memory, in which second data bytes are read from the memory, in which each of the second data bytes, when there is no error, is a codeword of a block error code and in which one error signal per second data byte is determined that indicates whether or not this second data byte is a codeword.

A syndrome calculation circuit includes a matrix product calculation circuit. The matrix product calculation circuit is configured to generate syndrome bits in a composite field by calculating a matrix product of input data bits and a first arithmetic matrix. The first arithmetic matrix is a matrix product of a basis conversion matrix for converting a data string from a Galois field to the composite field and a second arithmetic matrix, which is at least a part of a parity check matrix.