The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). Method and apparatus for interleaving is provided. The method includes the following steps: constructing a plurality of pseudorandom sequences according to a pre-defined length of an interleaving sequence to be constructed; for each of the constructed pseudorandom sequences, constructing at least one corresponding numerical digit random sequence according to a number of more than two types of numerical values in this pseudorandom sequence; and, for each of the constructed pseudorandom sequences and the at least one corresponding numerical digit random sequence thereof, constructing a corresponding interleaving sequence according to a mapping relation between this pseudorandom sequence and the numerical digit random sequence, so that a plurality of interleaving sequences are allocated and indicated as multiple access signatures.

A symmetric interleaver for a Convolutional Neural Network (CNN) and Recurrent Neural Network (RNN) encoder and a circular padding mode are disclosed. The interleaver interleaves elements of an input block to form an output block in which an output neighborhood of elements for each element of the output block is symmetric to an input neighborhood of elements for each element of the input block. A position of an element of the input block is interleaved based on an index i of the position times a parameter modulo K in which the parameter is relatively prime with K. A test loss function may be used to train the encoder that includes a Binary Cross Entropy (BCE) loss function plus a function that minimizes a number of codeword pairs based on a Euclidean distance. The RNN encoder may be implemented as part of a Turbo Autoencoder (TurboAE) encoder.

Proposed is a bit-interleaver for an optical line terminal of an optical access network. The bit-interleaver contains a memory reader, that provides data streams at bit level to a space-time switch. The space-time switch reads within one input cycle up to N bit sets from the data streams. The switch switches within one writing cycle up to N bits onto up to its output ports, which provide respective output vectors. A number of N OR-function elements determine within the writing cycle respective single output bits. A number of N memory elements write within the one writing cycle a respective one of the output bits into a respective one of their bit sub-elements. A control unit that controls the reading of the data streams and also the switching of the bits by the switch. The control unit controls a choice of the writing addresses.

The present invention relates to communication field, disclosing a data block interleaving and deinterleaving method and apparatus for communication equipments. In the present invention, a recursive method for calculating interleaver or deinterleaver addresses for existing power line communication standards is proposed. The complex modulo operation is simplified to a series of Add-Compare-Subtract operations. Therefore, the hardware implementation complexity is significantly reduced.