H03M13/3761

Allocating cache memory in a dispersed storage network

A method for execution by a dispersed storage network (DSN) managing unit includes receiving access information from a plurality of distributed storage and task (DST) processing units via a network. Cache memory utilization data is generated based on the access information. Configuration instructions are generated for transmission via the network to the plurality of DST processing units based on the cache memory utilization data.

Transmitter and method for generating additional parity thereof

A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted in a current frame; a parity permutator configured to perform by group-wise interleaving a plurality of bit groups configuring the parity bits based on a group-wise interleaving pattern comprising a first pattern and a second pattern; a puncturer configured to puncture some of the parity-permutated parity bits; and an additional parity generator configured to select at least some of the punctured parity bits to generate additional parity bits to be transmitted in a previous frame of the current frame, based on the first pattern and the second pattern.

Masking Defective Bits in a Storage Array

A method of failure mapping is provided. The method includes determining that a non-volatile memory block in the memory has a defect and generating a mask that indicates the non-volatile memory block and the defect. The method includes reading from the non-volatile memory block with application of the mask, wherein the reading and the application of the mask are performed by the non-volatile solid-state storage.

Managing Correlated Outages in a Dispersed Storage Network

A storage network processing system includes a processor, a network interface and memory that stores operational instructions. The operation instructions enable the processor to receive a data object for storage and dispersed error encode the data object in accordance with dispersed error encoding parameters to produce a plurality of encoded data slices. The operation instructions further enable the processor to generate to determine a plurality of site slice sets from the plurality of encoded data slices, where each site slice set of the plurality of site slice sets includes a number of unique encoded data slices of the plurality of encoded data slices that is greater than or equal to a site write threshold value. The operation instructions further enable the processor to a designate one of a plurality of storage sites for each of the plurality of site slice sets and transmit each of the plurality of site slice sets to a corresponding designated one of the plurality of storage sites via the network.

Storage network with enhanced data access performance
11704184 · 2023-07-18 · ·

A method for execution by a storage network begins by issuing a decode threshold number of read requests for a set of encoded data slices to a plurality of storage units of a set of storage units and continues by determining whether less than a decode threshold number of read requests has been received in a time window. The method continues by identifying one or more encoded data slices encoded data slices associated with read requests of the decode threshold number of read requests that have not been received and for an encoded data slice of the one or more encoded data slices, issuing a priority read request to a storage unit storing a copy of the encoded data slice. The method then continues by receiving a response from the storage unit storing the copy of the encoded data, where the storage unit storing the copy of the encoded data slice is adapted to delay one or more maintenance tasks in response to the priority read request.

System and method for high reliability fast RAID decoding for NAND flash memories

A flash memory system may include a flash memory and a circuit for decoding a result of a read operation on the flash memory using a first codeword. The circuit may be configured to generate an estimated codeword based on a result of hard decoding the first codeword and a result of hard decoding a second codeword. The circuit may be further configured to generate soft information based on the hard decoding result of the first codeword and the estimated codeword. The circuit may be further configured to decode the result of the read operation on the flash memory using the soft information.

Communication Devices and Methods for Iterative Code Design

A first communication device and a second communication device for an iterative code design are provided. The first communication device generates and transmits sets of parity symbols and receives the transmitted sets of parity symbols from a second communication device. The sets of parity symbols are generated based on using a first generator device and based previously transmitted systematic symbols and computed noise values. The second communication device buffers received systematic symbols and sets of parity symbols and jointly decodes them. Thereby, an iterative code design is provided with improved performance. Furthermore, the disclosure also relates to corresponding methods and a computer program.

Modifying storage of encoded data slices based on changing storage parameters

A method includes determining a change to storage parameters associated with storage of data objects in a storage network, where a data segment of the data objects is dispersed storage error encoded into a set of encoded data slices based on dispersed storage error encoding parameters, and where the set of encoded data slices is stored in the set of storage units. The method also includes determining a storage modification process for the set of encoded data slices based on the change to the storage parameters. The method also includes executing the storage modification process such that the set of encoded data slices are stored in the storage network in accordance with the changed storage parameters.

Increased data reliability

A method for adjustable error correction in a storage cluster is provided. The method includes determining health of a non-volatile memory of a non-volatile solid-state storage unit of each of a plurality of storage nodes in a storage cluster on a basis of per flash package, per flash die, per flash plane, per flash block, or per flash page. The determining is performed by the storage cluster. The plurality of storage nodes is housed within a chassis that couples the storage nodes as the storage cluster. The method includes adjusting erasure coding across the plurality of storage nodes based on the health of the non-volatile memory and distributing user data throughout the plurality of storage nodes through the erasure coding. The user data is accessible via the erasure coding from a remainder of the plurality of storage nodes if any of the plurality of storage nodes are unreachable.

Storage unit shutdown in a distributed storage network using a load-balancer

A method begins by a load balancing module of a distributed storage network (DSN) determining availability of a plurality of DSN processing units of a set of DSN processing units based on availability information associated with the plurality of DSN processing units and in response to determined availability, selecting a DSN processing unit form the set to process a data access request. The method continues with the load balancing module receiving an indication that the DSN processing unit is no longer available from the DSN processing unit while the DSN processing unit continues to process previously pending data access requests. The method continues with the load balancing module cancelling selection of the DSN processing unit to process the data access request; and receiving a second indication from the DSN processing unit indication that the DSN processing unit is available.