A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted in a current frame; a parity permutator configured to perform by group-wise interleaving a plurality of bit groups configuring the parity bits based on a group-wise interleaving pattern comprising a first pattern and a second pattern; a puncturer configured to puncture some of the parity-permutated parity bits; and an additional parity generator configured to select at least some of the punctured parity bits to generate additional parity bits to be transmitted in a previous frame of the current frame, based on the first pattern and the second pattern.

Systems, devices, and methods for encoding information bits for storage, including encoding information bits and balance bits to obtain a first bit chunk of a first arrangement; permuting the first bit chunk to obtain a second bit chunk of a second arrangement; encoding the second bit chunk to obtain a third bit chunk of the second arrangement; permuting a first portion of the third bit chunk to obtain a fourth bit chunk of the first arrangement, and encoding the fourth bit chunk to obtain a fifth bit chunk of the first arrangement; permuting a second portion of the third bit chunk, and adjusting the balance bits based on the fifth bit chunk and the permutated second portion of the third bit chunk; adjusting the first arrangement based on the adjusted balance bits, and obtaining a codeword based on the adjusted first arrangement; and transmitting the codeword to a storage device.

A particular overall architecture for transmission over a bonded channel system consisting of two interconnected MoCA (Multimedia over Coax Alliance) 2.0 SoCs (Systems on a Chip) and a method and apparatus for the case of a “bonded” channel network. With a bonded channel network, the data is divided into two segments, the first of which is transported over a primary channel and the second of which is transported over a secondary channel.

A transmitter is provided. The transmitter includes: an outer encoder configured to encode input bits to generate outer-encoded bits including the input bits and parity bits; a zero padder configured to generate a plurality of bit groups each of which is formed of a same number of bits, determine whether a number of the outer-encoded bits satisfies a predetermined number of bits required according to at least one of a code rate and a code length for Low Density Parity Check (LDPC) encoding, pads zero bits to some of the bits in the bit groups if the number of the outer-encoded bits is less than the predetermined number of bits, and maps the outer-encoded bits to remaining bits in the bit groups, based on a predetermined shortening pattern, thereby to constitute LDPC information bits; and an LDPC encoder configured to encode the LDPC information bits, wherein the some of the bits, in which zero bits are padded, are included in some of the bit groups which are not sequentially disposed in the LDPC information bits.

A zero padding apparatus and method for variable length signaling information are disclosed. A zero padding apparatus according to an embodiment of the present invention includes a processor configured to generate a LDPC information bit string by deciding a number of groups whose all bits are to be filled with 0 using a difference between a length of the LDPC information bit string and a length of a BCH-encoded bit string, selecting the groups using a shortening pattern order to fill all the bits of the groups with 0, and filling at least a part of remaining groups, which are not filled with 0, with the BCH-encoded bit string; and memory configured to provide the LDPC information bit string to an LDPC encoder.

Apparatuses for transmitting and receiving a signal in a communication system are provided. An apparatus of a receive device includes a receiver configured to receive, from a transmit device, a signal comprising remaining bits of parity bits after puncturing, wherein the parity bits are obtained by adding at least one shortened bit to information bits to obtain input bits for an encoding, if a number of the information bits is less than a number of the input bits for the encoding; and a hardware processor configured to determine a number of puncture bits for the parity bits, generate an output signal by adding at least one value corresponding to the number of the puncture bits to the signal, and decode the output signal.

A system and method for providing error control coding for backhaul applications are disclosed. Data is first encoded using Reed-Solomon (RS) coding. The output RS blocks are then turbo coded. The size of the output RS blocks is selected to match the input of the turbo encoder. The bits from the RS blocks may be interleaved to create the input turbo blocks. Cyclic Redundancy Check (CRC) parity bits may be added to the data prior to RS coding.

There is provided a method for generating a burst error correction code. The method comprises: setting a mother code; defining a syndrome set corresponding to each burst error pattern for at least two burst error patterns to be corrected based on the mother code; shortening a column of a PCM (parity check matrix) of the mother code so that the defined syndrome sets are relatively prime; and designing an error correction code for the each burst error pattern based on an optimal generator polynomial maximizing a length of the shortened code within a range of a length of a parity bit of the mother code or a syndrome vector included in the syndrome set that is relatively prime.

A parity interleaving apparatus and method for fixed length signaling information are disclosed. A parity interleaving apparatus according to an embodiment of the present invention includes a processor configured to generate a parity bit string for parity puncturing by segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of groups, and group-wise interleaving the groups using an order of group-wise interleaving; and memory configured to provide the parity bit string for parity puncturing to a parity puncturing unit.

The disclosure relates to a communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT). The disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. The disclosure relates to encoding and decoding by using a polar code in a wireless communication system, and an operation method of a transmission-end apparatus includes determining segmentation and the number of segments, based on parameters associated with encoding of information bits, encoding the information bits according to the number of check bits, and transmitting the encoded information bits to a reception-end apparatus.