Patent classifications
H03M13/6393
Multi-Rate ECC Parity For Fast SLC Read
A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to create a dual parity matrix. The dual parity matrix includes a full parity form that includes a payload, a first parity portion, and a second parity portion and a reduced parity form that includes the payload and the first parity portion. The second parity portion is 0. The controller is further configured to create an incremental parity construction matrix. The incremental parity construction matrix includes two arrays. A first array includes a first payload portion, a first, first parity portion, and a first, second parity portion and a second array includes a second payload portion, a second, first parity portion, and a second, second parity portion. The incremental parity construction matrix is arranged in either a block triangular construction or a block diagonal construction.
Rate matching methods for LDPC codes
A method of producing a set of coded bits from a set of information bits for transmission between a first node and a second node in a wireless communications system, the method comprises generating a codeword vector by encoding the set of information bits with a low-density parity-check code, wherein the codeword vector is composed of systematic bits and parity bits. The method comprises performing circular buffer-based rate matching on the generated codeword vector to produce the coded bits for transmission, wherein the circular buffer-based rate matching comprises puncturing a first plurality of systematic bits.
Method and apparatus for channel encoding and decoding in communication or broadcasting system
A pre-5th-generation (pre-5G) or 5G communication system for supporting higher data rates beyond a 4th-generation (4G) communication system, such as long term evolution (LTE) is provided. A channel encoding method in a communication or broadcasting system includes identifying an input bit size, determining a block size (Z), determining a low density parity check (LDPC) sequence to perform LDPC encoding, and performing the LDPC encoding based on the LDPC sequence and the block size.
Apparatus and method for encoding and decoding channel in communication or broadcasting system
The present invention related to a 5G or pre-5G communication system to be provided to support a higher data transmission rate since 4G communication systems like LTE. The present invention relates to a method and an apparatus for encoding a channel in a communication or broadcasting system supporting parity-check matrices having various sizes are provided. The method for encoding a channel includes determining a block size of the parity-check matrix; reading a sequence for generating the parity-check matrix, and transforming the sequence by applying a previously defined operation to the sequence based on the determined block size.
Method and apparatus for channel encoding/decoding in a communication or broadcasting system
A channel encoding method in a communication or broadcasting system is provided. The channel encoding method includes reading a first sequence corresponding to a parity check matrix, converting the first sequence to a second sequence by applying a certain rule to a block size corresponding to a parity check matrix and the first sequence, and encoding information bits based on the second sequence. The block size has at least two different integer values.
ROW ORTHOGONALITY IN LDPC RATE COMPATIBLE DESIGN
Certain aspects of the present disclosure generally relate to methods and apparatus for decoding low-density parity check (LDPC) codes, for example, using a parity check matrix having full row-orthogonality. An exemplary method for performing low-density parity-check (LDPC) decoding includes receiving soft bits associated to an LDPC codeword and performing LDPC decoding of the soft bits using a parity check matrix, wherein each row of the parity check matrix corresponds to a lifted parity check of a lifted LDPC code, at least two columns of the parity check matrix correspond to punctured variable nodes of the lifted LDPC code, and the parity check matrix has row orthogonality between each pair of consecutive rows that are below a row to which the at least two punctured variable nodes are both connected.
LDPC CODE ENCODING METHOD AND COMMUNICATION APPARATUS
An LDPC code encoding method and a communication apparatus are described that provide increased redundant bits through retransmission in an IR-HARQ mechanism, so as to decrease a channel coding rate, and improve decoding performance of an LDPC code. A check matrix of the LDPC code is used as a basic matrix, and the basic matrix is extended to obtain a mother matrix compatible with a plurality of code rates. During LDPC encoding, a transmit device reads, from the mother matrix, a check matrix corresponding to a required code rate, and performs LDPC encoding on an information bit sequence based on the read check matrix. LDPC encoding is performed on the information bit sequence by using check matrices of different sizes, to obtain different quantities of redundant bits.
METHOD AND APPARATUS FOR CHANNEL ENCODING AND DECODING IN COMMUNICATION OR BROADCASTING SYSTEM
A pre-5th-generation (pre-5G) or 5G communication system for supporting higher data rates beyond a 4th-generation (4G) communication system, such as long term evolution (LTE) is provided. A channel encoding method in a communication or broadcasting system includes identifying an input bit size, determining a block size (Z), determining a low density parity check (LDPC) sequence to perform LDPC encoding, and performing the LDPC encoding based on the LDPC sequence and the block size.
ENCODING TECHNIQUE FOR HARQ OPERATION
A transmission station (STA) of a wireless local area network system, according to various embodiments, may configure a plurality of blocks for encoding. The plurality of blocks may each comprise a data block and a CRC block for detecting an error of the data block. The transmission STA encodes each of the plurality of blocks and may transmit the plurality of encoded blocks.
LOW DENSITY PARITY CHECK DECODER, ELECTRONIC DEVICE, AND METHOD THEREFOR
An electronic device is configured to perform a series of low density parity check, LDPC, decoding operations that use at least one basegraph that comprises two or more columns, each column associated with a set of two or more soft bit values. The electronic device includes two or more rotators, each rotator-configured to rotate an order of a subset of two or more soft bit values of the set of two or more soft bit values of a column when activated in an LDPC decoding operation; wherein rotations associated with each column in each basegraph are performed by a particular one of the rotators-of the two or more rotators, wherein each rotator performs rotations for a set of one or more columns, with at least one of the rotators performing rotations for two or more columns in a same basegraph.