Systems, apparatuses, and methods for performing digital pre-distortion compensation of digital-to-analog converter non-linearity are described. A correction circuit receives a digital input word and couples a portion of the most significant bits (MSB's) of the digital input word to a correction lookup table (LUT). A correction value is retrieved from a correction LUT entry that matches the MSB's of the digital input word. Next, the correction value is added to the original digital input word in the digital domain. Then, the sum generated by adding the correction value to the original digital input word is optionally clipped if the sum exceeds the DAC core's input range. Next, the DAC core converts the sum into an analog value that is representative of the digital input word. The above approach helps to reduce non-linearities introduced by the DAC core in an energy-efficient manner by performing a correction in the digital domain.

A method of applying digital pre-distortion includes: outputting, by a look-up table, a first table value based on an input digital signal; adding the first table value and the input digital signal to generate a first combined signal comprising a first combined value having a first integer coefficient and a first fractional coefficient; separating the first integer coefficient from the first fractional coefficient to generate a first integer signal representing the first integer coefficient and a first fractional signal representing the first fractional coefficient; generating a delta-sigma modulated signal based on the first fractional signal; converting, by a first digital-to-analog, a first digital signal into a first analog signal, wherein the first digital signal is representative of the first integer signal; and converting, by a second DAC, a second digital signal into a second analog signal, wherein the second digital signal is representative of the delta-sigma modulated signal.

The present invention relates to a sigma-delta analogue-to-digital converter. The sigma-delta analogue-to-digital converter comprises a transconductance stage having first, second and third terminals. A capacitor is connected in parallel at the third terminal. Further, the sigma-delta analogue-to-digital converter comprises a quantiser at the third terminal of the transconductance stage with feedback by a voltage digital-to-analogue converter for feeding back a feedback signal to one of the terminals of the transconductance stage.

A method of applying digital pre-distortion includes: outputting, by a look-up table, a first table value based on an input digital signal; adding the first table value and the input digital signal to generate a first combined signal comprising a first combined value having a first integer coefficient and a first fractional coefficient; separating the first integer coefficient from the first fractional coefficient to generate a first integer signal representing the first integer coefficient and a first fractional signal representing the first fractional coefficient; generating a delta-sigma modulated signal based on the first fractional signal; converting, by a first digital-to-analog, a first digital signal into a first analog signal, wherein the first digital signal is representative of the first integer signal; and converting, by a second DAC, a second digital signal into a second analog signal, wherein the second digital signal is representative of the delta-sigma modulated signal.

Facilitating minimization of non-linearity effects of a delay of a capacitance-to-voltage (C2V) converter on an output of a gyroscope is presented herein. A sense output signal of a sense mass of the gyroscope and a drive output signal of a drive mass of the gyroscope are electronically coupled to respective analog-to-digital converter (ADC) inputs of bandpass sigma-delta ADCs of the gyroscope. The bandpass sigma-delta ADCs include respective C2V converters that are electronically coupled, via respective feedback loops, to the respective ADC inputs to facilitate reductions of respective propagation delays of the bandpass sigma-delta ADCs. Respective ADC outputs of the bandpass sigma-delta ADCs are electronically coupled to demodulator inputs of a demodulator of the gyroscope that transforms the sense output into an output of the MEMS gyroscope representing an external stimulus that has been applied to the sense mass.

A sigma-delta modulation device includes a detection circuit and a sigma-delta modulator. The detection circuit is configured to detect an input signal to generate a detection signal, and compare the detection signal and a threshold to generate a control signal. The sigma-delta modulator is coupled to the detection circuit and configured to store a plurality of noise transfer functions, select one of the noise transfer functions according to the control signal, and convert the input signal into an output signal according to the noise transfer function.

An analog/digital converter (ADC) includes an analog stage with at least one first sigma-delta modulator and includes a digital stage with at least one second sigma-delta modulator. The analog stage is configured for outputting a digital signal to the digital stage that is indicative of a noise contribution of the at least one first sigma-delta modulator. The analog stage and the digital stage may be arranged in a multi-stage noise shaping architecture (MASH) architecture.

A phase-locked loop (PLL) includes a spur cancellation circuit that receives a residue signal indicative of a first frequency and receives a residual phase error signal and generates a spur cancellation signal. A summing circuit combines the spur cancellation signal and a first phase error signal corresponding to a phase difference between a reference signal and a feedback signal in the PLL and generates a second phase error signal with a reduced spurious tone at the first frequency.

The amplifier load current cancellation in a current integrator comprises applying an input current to an operational transconductance amplifier provided with an integration capacitor for current integration, leading an output current of the operational transconductance amplifier through a sensing resistor, thus producing a voltage drop over the sensing resistor, generating a cancellation current dependent on the voltage drop over the sensing resistor, and injecting the cancellation current to the output current, before or after the output current passes the sensing resistor, thus eliminating a dependence of the output current on the input current.

A switched-capacitor delta-sigma data converter circuit includes compensation for voltage reference error that may cause non-linearity and inter-channel crosstalk. The circuit includes a voltage reference circuit, an integrator, a quantizer that quantizes the output of the integrator and a reference feedback switched-capacitor network that provides feedback charge quanta to the integrator that represents an output of the quantizer, so that the output of the quantizer, on average, represents an input signal provided to the integrator. In addition, a compensation switched-capacitor network is included for drawing dummy load charge quanta from the voltage reference output that is not provided to the integrator so that a total charge drawn from the voltage reference output when the reference feedback switched-capacitor network is coupled to the voltage reference output does not vary as the input voltage varies.