The control circuit for a MEMS gyroscope is configured to receive a measurement signal which has a quadrature component and a sensing component. The control circuit has: an input stage which acquires an input signal, generating an acquisition signal, where the input signal is a function of the measurement signal and of a quadrature cancellation signal; a processing stage which extracts a first component of the acquisition signal, indicative of the sensing component of the measurement signal and having a sensing frequency band; and a quadrature correction stage which extracts a second component of the acquisition signal, indicative of the quadrature component of the measurement signal, and generates the quadrature cancellation signal from a reference signal. The quadrature cancellation signal is a signal modulated as a function of the second component of the acquisition signal, at an update frequency which is outside the sensing frequency band.

A combined I/Q DAC is provided with a plurality of sources corresponding to a plurality of selectors in which the corresponding source drives the corresponding selector with a source signal to produce a corresponding pair of in-phase and quadrature-phase analog input signals to a summation network. Each selector routes its source signal responsive to a digital value of a corresponding in-phase and quadrature-phase bit pair.

A method and apparatus are described for bio-impedance measurement using voltage to current conversion. In one example, a bio-impedance transducer includes an input stage to receive a bio-impedance signal having an oscillating voltage from two electrodes, the electrodes being coupled to a body, a resistance across the two electrodes to determine an alternating current of the bio-impedance signal, a gain stage coupled to the resistance to amplify the alternating current, a down converter coupled to the gain stage to convert the amplified alternating current to a direct current bio-impedance signal, and an analog-to-digital converter coupled to the down converter to convert the direct current bio-impedance signal to a digital bio-impedance signal.

A combined I/Q DAC is provided with a plurality of sources corresponding to a plurality of selectors in which the corresponding source drives the corresponding selector with a source signal to produce a corresponding pair of in-phase and quadrature-phase analog input signals to a summation network. Each selector routes its source signal responsive to a digital value of a corresponding in-phase and quadrature-phase bit pair.

Radio-frequency (RF) receivers having bandpass sigma-delta analog sigma analog-to-digital converters (ADC) designed to digitize signals in the RF domain are described. Such bandpass ADCs utilize one or more of the following techniques to enhance noise immunity and reduce power consumption: generation of in-phase (I) and quadrature (Q) paths in the digital domain, n.sup.th order resonant bandpass filtering with n>1, and signal sub-sampling in an i.sup.th Nyquist zone with i>1. Compared to RF receivers in which the I and Q paths are generated in the analog domain, these RF receivers exhibit higher IRRs because they are not susceptible to in-phase/quadrature (IQ) mismatch. Using n.sup.th order resonant bandpass filtering with n>1 attenuates unwanted image tones. The bandpass ADC-based RF receivers described herein exhibit enhanced immunity to noise, achieving for example image rejection ratios (IRR) in excess of 95 dB.

A receiver system includes an interface between a radio receiver on a radio frequency (RF)-side and a baseband receiver on a baseband (BB)-side. The receiver includes an antenna for receiving radio frequency signals and an analogue-to-digital converter for converting received analogue signals to digital signals. The digital signals are further processed in the baseband receiver by a digital signal processing unit. The analogue-to-digital converter is a sigma-delta converter, which includes a sigma-delta modulator on the RF-side and a decimation filter on the BB-side. The sigma-delta modulator and the decimation filter are connected only by single-bit in-phase (I) and quadrature (Q) streams output lines.

The invention relates to an analog-to-digital converter (ADC). The objective of the invention to have an analog-to-digital converter with the capability of non-equidistant sample time spacing and minimizing energy consumption will be solved by an apparatus comprising a sigma-delta modulator and a sample-time-counter, both controlled by a sample clock, a next-sample-time-computation unit configured to compute a sample-time-counter value when a next digital output sample is requested, a sample-computation-trigger unit connected to the next-sample-time-computation unit configured to compare an actual sample-time-counter value with the sample-time-counter value when the next digital output sample is requested and to trigger a computation unit for calculating a next digital sample when requested and by powering off the sigma-delta modulator in intervals where its delivered samples are not used for any computed decimator output sample. The objective is also solved by a method using the aforementioned analog-to-digital converter.

Radio-frequency (RF) receivers having bandpass sigma-delta analog sigma analog-to-digital converters (ADC) designed to digitize signals in the RF domain are described. Such bandpass ADCs utilize one or more of the following techniques to enhance noise immunity and reduce power consumption: generation of in-phase (I) and quadrature (Q) paths in the digital domain, n.sup.th order resonant bandpass filtering with n>1, and signal sub-sampling in an i.sup.th Nyquist zone with i>1. Compared to RF receivers in which the I and Q paths are generated in the analog domain, these RF receivers exhibit higher IRRs because they are not susceptible to in-phase/quadrature (IQ) mismatch. Using n.sup.th order resonant bandpass filtering with n>1 attenuates unwanted image tones. The bandpass ADC-based RF receivers described herein exhibit enhanced immunity to noise, achieving for example image rejection ratios (IRR) in excess of 95dB.

A delta-sigma modulation circuit is enabled to be used to detect a pen signal. An integrated circuit according to the present disclosure is a sensor controller that detects pen signals transmitted from an active pen. The integrated circuit includes a delta-sigma modulation circuit including a subtractor that subtracts a feedback signal from a received signal input from a sensor, an integrator that integrates an output signal of the subtractor, a quantizer that quantizes an output signal of the integrator, and a digital analog converter that generates the feedback signal based on an output value of the quantizer. The integrated circuit also has a processor that detects a level of the received signal based on an output value of the delta-sigma modulation circuit, and a gain controller that a level of the feedback signal based on the level of the received signal detected by the processor.

Radio-frequency (RF) receivers having bandpass sigma-delta analog sigma analog-to-digital converters (ADC) designed to digitize signals in the RF domain are described. Such bandpass ADCs utilize one or more of the following techniques to enhance noise immunity and reduce power consumption: generation of in-phase (I) and quadrature (Q) paths in the digital domain, n.sup.th order resonant bandpass filtering with n>1, and signal sub-sampling in an i.sup.th Nyquist zone with i>1. Compared to RF receivers in which the I and Q paths are generated in the analog domain, these RF receivers exhibit higher IRRs because they are not susceptible to in-phase/quadrature (IQ) mismatch. Using n.sup.th order resonant bandpass filtering with n>1 attenuates unwanted image tones. The bandpass ADC-based RF receivers described herein exhibit enhanced immunity to noise, achieving for example image rejection ratios (IRR) in excess of 95 dB.