Patent classifications
H03M3/444
APPARATUS FOR OVERLOAD RECOVERY OF AN INTEGRATOR IN A SIGMA-DELTA MODULATOR
Described is an apparatus which comprises: a first integrator to receive an input signal and to generate a first output; a second integrator to receive the first output or a version of the first output and to generate a second output; and an analog-to-digital converter (ADC) to quantize the second output into a digital representation, the ADC including a detection circuit to detect an overload condition in the second output.
METHOD AND APPARATUS FOR NONLINEAR FILTERING AND FOR MITIGATION OF INTERFERENCE
Method and apparatus for nonlinear signal processing include mitigation of outlier noise in the process of analog-to-digital conversion and adaptive real-time signal conditioning, processing, analysis, quantification, comparison, and control. Methods, processes and apparatus for real-time measuring and analysis of variables include statistical analysis and generic measurement systems and processes which are not specially adapted for any specific variables, or to one particular environment. Methods and corresponding apparatus for mitigation of electromagnetic interference, for improving properties of electronic devices, and for improving and/or enabling coexistence of a plurality of electronic devices include post-processing analysis of measured variables and post-processing statistical analysis.
APPARATUS FOR OVERLOAD RECOVERY OF AN INTEGRATOR IN A SIGMA-DELTA MODULATOR
Described is an apparatus which comprises: a first integrator to receive an input signal and to generate a first output; a second integrator to receive the first output or a version of the first output and to generate a second output; and an analog-to-digital converter (ADC) to quantize the second output into a digital representation, the ADC including a detection circuit to detect an overload condition in the second output.
Apparatus for overload recovery of an integrator in a sigma-delta modulator
Described is an apparatus which comprises: a first integrator to receive an input signal and to generate a first output; a second integrator to receive the first output or a version of the first output and to generate a second output; and an analog-to-digital converter (ADC) to quantize the second output into a digital representation, the ADC including a detection circuit to detect an overload condition in the second output.
APPARATUS FOR OVERLOAD RECOVERY OF AN INTEGRATOR IN A SIGMA-DELTA MODULATOR
Described is an apparatus which comprises: a first integrator to receive an input signal and to generate a first output; a second integrator to receive the first output or a version of the first output and to generate a second output; and an analog-to-digital converter (ADC) to quantize the second output into a digital representation, the ADC including a detection circuit to detect an overload condition in the second output.
Apparatus for overload recovery of an integrator in a sigma-delta modulator
Described is an apparatus which comprises: a first integrator to receive an input signal and to generate a first output; a second integrator to receive the first output or a version of the first output and to generate a second output; and an analog-to-digital converter (ADC) to quantize the second output into a digital representation, the ADC including a detection circuit to detect an overload condition in the second output.
Digital architecture for delta-sigma RMS-to-DC converter
Disclosed is a completely digital solution for a new type of root-mean-square to direct current conversion (RMS-to-DC) apparatus. The design is based on delta-sigma modulation (-M) and the direct nonlinear processing of the - modulated pulse stream. The only external component of the integrated circuit (IC) is capacitor C. The disclosed apparatus consists of low power consuming components which are simple, reliable and inexpensive.