Systems and methods are disclosed herein that relate to a wireless device that intelligently uses different reference crystal oscillators (XOs) for a Phase Locked Loop(s) (PLL(s)) in a transceiver of the wireless device. Embodiments of a method of operation of a wireless device comprising a first XO that operates at a first reference frequency and a second XO that operates at a second reference frequency that is greater than the first reference frequency are disclosed. In some embodiments, the method of operation of the wireless devices comprises deciding whether to configure a receiver of the wireless device to use the first XO or the second XO and configuring the receiver of the wireless device to use the first XO or the second XO in accordance with the decision.

In an embodiment, an apparatus includes a transmit section including a first baseband section and a first radio frequency (RF) section, wherein the transmit section is configured to receive a calibration signal, the first RF section is configured to generate a RF calibration signal based on modulating the calibration signal. The calibration signal comprises an orthogonal code based signal; and a receive section configured to receive the RF calibration signal over-the-air, the receive section includes a second RF section and a calibration section, the second RF section is configured to generate a received calibration signal based on the RF calibration signal, the received calibration signal and a reference signal associated with the RF calibration signal comprise inputs to the calibration section and the calibration section is configured to determine one or more of gain, baseband delay, or RF delay compensation values, based on the inputs, to calibrate the transmit section.

In an embodiment, a communications system includes a first transmitter including a digital beamforming baseband section configured to receive an input signal to be transmitted, the input signal at a baseband frequency, and a modulation section electrically coupled to the digital beamforming baseband section and a first antenna of a phased array antenna. The modulation section is configured to receive a local oscillator signal at a first local oscillator frequency and apply a baseband frequency shift to the input signal to generate a baseband frequency shifted input signal. The modulation section generates a modulated signal based on the input signal. The communication system includes a second transmitter included in a second IC chip of the plurality of IC chips electrically coupled to a second antenna and configured to provide a second modulated signal at the carrier frequency and a second LO leakage signal at a second local oscillator frequency.

A receive extender in an integrated circuit may include: N phase-adjustment circuits that adjust phases of N receive signals from N receive antennas; and an N:1 demultiplexer that coherently combines the N receive signals into an output signal, which is provided to the transceiver chip. Moreover, a transmit extender in the integrated circuit may include: a 1:M multiplexer that coherently separates a transmit signal from the transceiver chip into M transmit signals, where N and M are non-zero integers that may be different; and M phase-adjustment circuits that adjust phases of the M transmit signals, which are provided to M transmit antennas. Note that the integrated circuit may be coupled to a second integrated circuit that phase shifts the output signal and the transmit signal based at least in part on the oscillator signal. Moreover, control signals between the integrated circuit and the second integrated circuit may be synchronized.

Disclosed is a digital radio-frequency transmitter, which includes a digital logic mixer, a digital power amplifier and an antenna, wherein an output terminal of the digital logic mixer is connected with an input terminal of the digital power amplifier; an output terminal of the digital power amplifier is connected to the antenna; the digital logic mixer is configured to perform logic mixing on baseband data and a radio-frequency local oscillator clock signal which are input into the digital radio-frequency transmitter to generate radio-frequency data; the digital power amplifier is configured to convert the radio-frequency data into an analog power signal; and the antenna is configured to transmit the analog power signal out. According to the digital radio-frequency transmitter of the present application, the circuit layout area and the circuit operation consumption can be effectively reduced.

Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a transceiver chain may receive, using a downconverter tuned by at least one local oscillator, transmit signals that are modulated using a modulation bandwidth and that span a total bandwidth greater than or equal to the modulation bandwidth. The at least one local oscillator may cover a first fraction of the total bandwidth. The transceiver chain may receive, using at least one analog-to-digital converter, input from the downconverter, and may output a first digital signal based at least in part on the input and sampling at the first fraction of the total bandwidth. The transceiver chain may determine an error associated with the transmit signals based at least in part on the first digital signal, and may perform digital pre-distortion on new signals based at least in part on the error. Numerous other aspects are described.

Receiving, at a receiver, a wake-up signal over a wireless communications channel, the wake-up signal including a multiband wake-up-radio (WUR) data unit that includes a plurality of WUR frames, each WUR frame occupying a respective predefined bandwidth within an overall bandwidth of the WUR data unit; filtering a selected WUR frame from the plurality of WUR frames according to the predefined bandwidth occupied by the selected WUR frame; and recovering a set of bits from the selected WUR frame by assigning a bit value to each of a plurality of waveform coded symbols included in the selected WUR frame based on a power distribution within each of the waveform coded symbols.

A transceiver circuit includes a receiver front end utilizing a ring oscillator, and a transmitter front end utilizing a pass-gate circuit in a first feedback path across a last-stage driver circuit. The transceiver circuit provides low impedance at low frequency and high impedance at high frequency, and desirable peaking behavior.

Systems and methods are disclosed herein that relate to a wireless device that intelligently uses different reference crystal oscillators (XOs) for a Phase Locked Loop(s) (PLL(s)) in a transceiver of the wireless device. Embodiments of a method of operation of a wireless device comprising a first XO that operates at a first reference frequency and a second XO that operates at a second reference frequency that is greater than the first reference frequency are disclosed. In some embodiments, the method of operation of the wireless devices comprises making a decision as to whether to configure a receiver of the wireless device to use the first XO or the second XO and configuring the receiver of the wireless device to use the first XO or the second XO in accordance with the decision.

A transceiver circuit includes a receiver front end utilizing a ring oscillator, and a transmitter front end utilizing a pass-gate circuit in a first feedback path across a last-stage driver circuit. The transceiver circuit provides low impedance at low frequency and high impedance at high frequency, and desirable peaking behavior.