A frequency equalizer is provided. The frequency equalizer includes a coupler including a main segment extending between a first port and a second port and a coupled segment disposed in a coupling relationship with the main segment and extending between a third port and a fourth port. The frequency equalizer further includes a first thermistor electrically coupled in series between the first port and an input line, a second thermistor electrically coupled in series between the second port and an output line, and a first shunt resistor coupled across the third port. The frequency equalizer simultaneously provides frequency equalization and temperature compensation for signals transmitted through the frequency equalizer.

A differential trace structure reducing the magnitude of low frequency attenuation is disclosed. The trace structure is formed on a printed circuit board. A pair of differential traces connects a signal receiver and a signal transmitter. A passive equalizer has a first shunt coupled to one of the pair of differential traces; and a second shunt coupled to the other one of the pair of differential traces. The passive equalizer has an inductor and a resistor coupled in series to the shunts. For low frequency signals, the passive equalizer behaves as a shunt resistance to the pair of differential traces.

A differential trace structure reducing the magnitude of low frequency attenuation is disclosed. The trace structure is formed on a printed circuit board. A pair of differential traces connects a signal receiver and a signal transmitter. A passive equalizer has a first shunt coupled to one of the pair of differential traces; and a second shunt coupled to the other one of the pair of differential traces. The passive equalizer has an inductor and a resistor coupled in series to the shunts. For low frequency signals, the passive equalizer behaves as a shunt resistance to the pair of differential traces.

A frequency equalizer is provided. The frequency equalizer includes a coupler including a main segment extending between a first port and a second port and a coupled segment disposed in a coupling relationship with the main segment and extending between a third port and a fourth port. The frequency equalizer further includes a first thermistor electrically coupled in series between the first port and an input line, a second thermistor electrically coupled in series between the second port and an output line, and a first shunt resistor coupled across the third port. The frequency equalizer simultaneously provides frequency equalization and temperature compensation for signals transmitted through the frequency equalizer.

A serial communication circuit (FIG. 3) is disclosed. The circuit includes an equalizer circuit (306) arranged to receive a data signal (CH 1) and produce an equalized data signal. A log detector circuit (300) receives the data signal and produces a power signal indicating a power level of the data signal. A decision circuit (332) receives the power signal and produces a select signal. A first selection circuit (336) receives a plurality of first correction signals and applies one of the first correction signals to the equalizer circuit in response to the select signal.