Patent classifications
H04L12/40052
Methods for operator control unit and payload communication
A method of communication between a payload and a platform, including providing power to at least one payload via a platform, periodically sending an identification message from the at least one payload to the platform, decoding the identification message with the platform and sending a response message to the at least one payload, requesting access to one or more ethernet busses supplied by the platform, and enabling the one or more ethernet busses.
Fault tolerant modualted trailer braking system
A system and method of controlling individual trailer brakes on a towed trailer supporting numerous fault tolerant behaviors including activating each operational brake when a brake is shorted. System operates in multiple modes where it operates with traditional brake controllers, operates in a degraded braking mode without a brake controller and in the preferred mode it retrieves vehicle information from tow vehicle and then communicates with a brake actuator controller over the trailer brake wire. When braking system includes wheel sensors traditional antilock releases are provided and unlike other braking systems this brake actuator controller can maintain wheel speeds below the trailer speed reducing or eliminating periodic wheel releases. System also diagnoses the mechanical operation of the trailer brakes including; identifying when brake adjustment is required, when brake friction surfaces are degrading, as well as diagnosing sensors, braking signals and brake actuator interfaces.
Subscriber station for a serial bus system and method for communication in a serial bus system
A subscriber station for a serial bus system including a communication control device for controlling a communication with another subscriber station and a transceiver device for sending a transmit signal produced by the communication control device as a frame to a bus of the bus system. The bit time of a signal sent to the bus in the first communication phase differs from a bit time of a signal sent in the second communication phase. The communication control device produces the transmit signal, in a first operating mode, for a first frame that is designed according to a specified communication protocol with which other subscriber stations in the bus system communicate, and is designed to produce the transmit signal, in a second operating mode, for a second frame that assigns to at least one bit a different function than is assigned to the bit in the specified communication protocol.
Controller Area Network Termination Scheme
A Controller Area Network (CAN) system, method, and circuit are provided with a dual mode bus line termination circuit connected between signal lines of a serial bus and optimized for both differential and single-ended communication modes over the serial bus, where the dual mode bus line termination circuit includes first and second resistance termination paths connected in parallel between first and second bus wires of the serial bus to provide an odd mode termination impedance (R.sub.ODD) that matches an impedance of the serial bus when operating in the differential communication mode, and to also provide an even mode termination impedance (R.sub.EVEN) that matches an impedance of the serial bus when operating in the single-ended communication mode.
Detecting abnormal events in vehicle operation based on machine learning analysis of messages transmitted over communication channels
A computer implemented method of identifying an abnormal event in an operational environment of a vehicle, comprising using one or more processors adapted for receiving a plurality of messages intercepted by one or more devices adapted to monitor messages transmitted via one or more segments of one or more communication channels of a vehicle, applying a plurality of trained machine learning models to evaluate compliance of each of the intercepted messages with one or more baseline models according to feature(s) identified for each intercepted message, the baseline model(s) defining learned message patterns is created by training the plurality of machine learning models with a plurality of training datasets comprising training messages reflecting valid operation of the vehicle, identifying incompliant intercepted message(s) which is incompliant with the baseline model(s), the incompliant message(s) is transmitted as result of one or more abnormal event and generating an alert indicative of the abnormal event(s).
LOW-POWER HIGH-SPEED CMOS CLOCK GENERATION CIRCUIT
A low-power clock generation circuit has a phase generator that receives an input clock signal and uses the input clock signal to generate multiple intermediate clock signals with different phase shifts, a phase rotator circuit that outputs phase-adjusted clock signals, a frequency doubler circuit that receives a plurality of the phase-adjusted clock signals and outputs two frequency-doubled clock signals having a 180° phase difference, and a quadrature clock generation circuit that receives the two frequency-doubled clock signals and provides four output signals that include in-phase and quadrature versions of the two frequency-doubled clock signals.
Method and system for virtualizing a plurality of controller area network bus units communicatively connected to an aircraft
A system for virtualizing a plurality of controller area network bus units communicatively connected to an aircraft, the system comprising a plurality of physical controller area network bus units, each is configured to detect a measured state datum of a plurality of measured state data of the aircraft; and transmit the plurality of measured state data to at least a network switch, the at least a network switch configured to receive the plurality of measured state data from the plurality of physical controller area network bus units, generate a single transmission signal as a function of the plurality of measured state data, and transmit the single transmission signal to a computing device, and the computing device configured to receive the transmission signal originating from the at least a network switch, and bridge each virtual controller area network bus unit of the plurality of virtual controller area network bus units.
Low-power high-speed CMOS clock generation circuit
A low-power clock generation circuit has a phase generator that receives an input clock signal and uses the input clock signal to generate multiple intermediate clock signals with different phase shifts, a phase rotator circuit that outputs phase-adjusted clock signals, a frequency doubler circuit that receives a plurality of the phase-adjusted clock signals and outputs two frequency-doubled clock signals having a 180° phase difference, and a quadrature clock generation circuit that receives the two frequency-doubled clock signals and provides four output signals that include in-phase and quadrature versions of the two frequency-doubled clock signals.
METHOD AND SYSTEM FOR VIRTUALIZING A PLURALITY OF CONTROLLER AREA NETWORK BUS UNITS COMMUNICATIVELY CONNECTED TO AN AIRCRAFT
A system for virtualizing a plurality of controller area network bus units communicatively connected to an aircraft, the system comprising a plurality of physical controller area network bus units, each is configured to detect a measured state datum of a plurality of measured state data of the aircraft; and transmit the plurality of measured state data to at least a network switch, the at least a network switch configured to receive the plurality of measured state data from the plurality of physical controller area network bus units, generate a single transmission signal as a function of the plurality of measured state data, and transmit the single transmission signal to a computing device, and the computing device configured to receive the transmission signal originating from the at least a network switch, and bridge each virtual controller area network bus unit of the plurality of virtual controller area network bus units.
Data sampler with capacitive digital-to-analog converter
Various embodiments provide for a data sampler with one or more capacitive digital-to-analog converters (DACs) for adjusting a threshold voltage range of the data sampler. According to some embodiments, two or more capacitive DACs can be used to set a threshold voltage for a data sampler and, by doing so, serve as a trigger mechanism for the data sampler.