H04L2012/5673

Method and device for monitoring downlink control channel

A method for monitoring a control channel in a wireless communication system and a wireless device using the same are provided. The wireless device monitors a downlink control channel in at least one physical resource block (PRB) pair of a subframe that is assigned for an enhanced physical downlink control channel (EPDCCH) set. A beatstream for downlink control information of the downlink control channel is scrambled by a scrambling sequence that is initialized on the basis of a scrambling initialization value allocated to the EPDCCH set.

DATA COMMUNICATION
20170272259 · 2017-09-21 ·

Systems and methods utilizing a packet gate to improve communication performance with respect to a resource shared for data communication are disclosed. In embodiments, a packet gate is utilized with respect to a shared resource to improve the effective throughput and reduce packet losses with respect to a plurality of data flows sharing the resource. In operation of embodiments, data packets are dissembled into chunks and encoded, such as using forward error correction, for transmission through a switching fabric, wherein at the egress of the switching fabric the packet gate tracks the number of chunks of a packet that has been received and when a sufficient number of chunks are received drops all subsequent chunks of that packet. The admitted encoded chunks are passed through the shared resource, wherein the chunks are decoded and reassembled into the packet at the output of the shared resource of embodiments.

Transmission and receiver apparatus and methods

The present invention relates to an apparatus and a corresponding method for mapping error correction code encoded time-domain data of at least two mapping input data streams (S1, S2, . . . , Sn) onto a time-domain mapping output data stream (Q) having a frame structure, comprising a data input (102) for receiving said at least two mapping input data streams (S1, S2, . . . , Sn) each being segmented into data blocks (D1, D2, . . . , DN) carrying error correction code encoded data, a data mapper (104) for mapping the data blocks (D1, D2, . . . , DN) of said at least two mapping input data streams (S1, S2, . . . , Sn) onto frames of said mapping output data stream (Q), each frame comprising a number of frame intervals (F1, F2, . . . , FM), wherein the data mapper (104) is adapted for mapping the data blocks (D1, D2, . . . , DN) onto said frame intervals such that each frame interval (F1, F2, . . . , FM) carries sequentially arranged data blocks (D1, D2, . . . , DN) from various mapping input data streams (S1, S2, . . . , Sn) and that within a frame the mapping of data blocks (D1, D2, . . . , DN) from the various mapping input data streams (S1, S2, . . . , Sn) onto frame intervals (F1, F2, . . . , FM) is different from frame interval to frame interval, and a data output (110) for outputting said mapping output data stream (Q).

Memory device with adaptive descrambling

Disclosed herein is a memory device and a method of descrambling and decoding encoded data. In one aspect, encoded data is received. A scrambling seed is obtained from the encoded data prior to decoding the encoded data. The encoded data is descrambled according to the scrambling seed, and the descrambled data is decoded. The descrambled data may be decoded according to statistics of the descrambled data.

MEMORY DEVICE WITH ADAPTIVE DESCRAMBLING

Disclosed herein is a memory device and a method of descrambling and decoding encoded data. In one aspect, encoded data is received. A scrambling seed is obtained from the encoded data prior to decoding the encoded data. The encoded data is descrambled according to the scrambling seed, and the descrambled data is decoded. The descrambled data may be decoded according to statistics of the descrambled data.

TRANSMISSION AND RECEIVER APPARATUS AND METHODS

The present invention relates to an apparatus and a corresponding method for mapping error correction code encoded time-domain data of at least two mapping input data streams (S1, S2, . . . , Sn) onto a time-domain mapping output data stream (Q) having a frame structure, comprising a data input (102) for receiving said at least two mapping input data streams (S1, S2, . . . , Sn) each being segmented into data blocks (D1, D2, . . . , DN) carrying error correction code encoded data, a data mapper (104) for mapping the data blocks (D1, D2, . . . , DN) of said at least two mapping input data streams (S1, S2, . . . , Sn) onto frames of said mapping output data stream (Q), each frame comprising a number of frame intervals (F1, F2, . . . , FM), wherein the data mapper (104) is adapted for mapping the data blocks (D1, D2, . . . , DN) onto said frame intervals such that each frame interval (F1, F2, . . . , FM) carries sequentially arranged data blocks (D1, D2, . . . , DN) from various mapping input data streams (S1, S2, . . . , Sn) and that within a frame the mapping of data blocks (D1, D2, . . . , DN) from the various mapping input data streams (S1, S2, . . . , Sn) onto frame intervals (F1, F2, . . . , FM) is different from frame interval to frame interval, and a data output (110) for outputting said mapping output data stream (Q).

Transmission and receiver apparatus and methods

The present invention relates to an apparatus and a corresponding method for mapping error correction code encoded time-domain data of at least two mapping input data streams (S1, S2, . . . , Sn) onto a time-domain mapping output data stream (Q) having a frame structure, comprising a data input (102) for receiving said at least two mapping input data streams (S1, S2, . . . , Sn) each being segmented into data blocks (D1, D2, . . . , DN) carrying error correction code encoded data, a data mapper (104) for mapping the data blocks (D1, D2, . . . , DN) of said at least two mapping input data streams (S1, S2, . . . , Sn) onto frames of said mapping output data stream (Q), each frame comprising a number of frame intervals (F1, F2, . . . , FM), wherein the data mapper (104) is adapted for mapping the data blocks (D1, D2, . . . , DN) onto said frame intervals such that each frame interval (F1, F2, . . . , FM) carries sequentially arranged data blocks (D1, D2, . . . , DN) from various mapping input data streams (S1, S2, . . . , Sn) and that within a frame the mapping of data blocks (D1, D2, . . . , DN) from the various mapping input data streams (S1, S2, . . . , Sn) onto frame intervals (F1, F2, . . . , FM) is different from frame interval to frame interval, and a data output (110) for outputting said mapping output data stream (Q).