Apparatus and methods are disclosed for transmitting and receiving data in a wireless communication network. Apparatus for transmitting data in a wireless communication network comprises a real modulation branch for modulating a first segment of a bit sequence to obtain a real modulated signal, a complex modulation branch for modulating a second segment of the bit sequence to obtain a complex modulated signal, a signal dividing unit configured to divide the bit sequence into a plurality of alternating first segments and second segments, and to send the first segments and the second segments to the real modulation branch and the complex modulation branch respectively, and a transmitter configured to transmit the real and complex modulated signals. Apparatus and methods are also disclosed for demultiplexing a plurality of data streams, using wide linear zero forcing with successive interference cancellation.

An information handling system includes a first component including a transmitter for a high-speed serial data interface, and a second component including a receiver for the high-speed serial data interface. The receiver includes an equalization stage and a decision feedback equalization (DFE) stage. The equalization stage has an input to configure the equalization stage in one of a first low equalization state and a first high equalization state. The DFE stage has a plurality of tap inputs. The first component provides a plurality of training runs on the high-speed serial data interface. The second component receives the training runs, provides for each training run a set of tap settings for each tap input, determines whether or not a variation in the tap settings for the training runs is greater than a predetermined variation value, and, when the variation is greater than the predetermined variation value, sets the first input to configure the first equalization stage from the first low equalization state to the first high equalization state.

An electronic system includes a feedforward equalizer, a feedback equalizer, an RFI canceler, and a control circuit. The feedforward equalizer and the feedback equalizer are configured to adjust the channel response of a transmission channel in the electronic system. The RFI canceler is configured to cancel the RFI presence in the electronic system. When the RFI canceler is off, the controller is configured to turn on the RFI canceler according to a signal error value before RFI cancelation, an error term of the electronic system, or an SNR of the electronic system.

A receiver includes signal lanes to receive associated data bit streams, and a control module. The signal lanes each include configurable equalization modules to provide a selectable compensation value to the associated data bit stream. The control module performs back channel adaptations on each data bit stream to achieve a target bit error rate for the associated signal lane, determines a most common set of compensation values from the performance of the back channel adaptations, determines whether the compensation value is within a predetermined boundary for that selectable compensation value, and provides an alert when a first compensation value of the most common set of compensation values is not within the predetermined boundary for the first compensation value.

Apparatus and methods are disclosed for transmitting and receiving data in a wireless communication network. Apparatus for transmitting data in a wireless communication network comprises a real modulation branch for modulating a first segment of a bit sequence to obtain a real modulated signal, a complex modulation branch for modulating a second segment of the bit sequence to obtain a complex modulated signal, a signal dividing unit configured to divide the bit sequence into a plurality of alternating first segments and second segments, and to send the first segments and the second segments to the real modulation branch and the complex modulation branch respectively, and a transmitter configured to transmit the real and complex modulated signals. Apparatus and methods are also disclosed for demultiplexing a plurality of data streams, using wide linear zero forcing with successive interference cancellation.

A high-speed serial data system includes a transmitter and a receiver. The receiver includes a compensation module, a memory, and a control module. The compensation module includes a setting that selects a compensation value from among a plurality of compensation values for a characteristic of the receiver. The memory stores a whitelist value from among the compensation values. The control module determines that a performance level of the receiver is below a performance level threshold. In response to determining that the performance level is below the performance level threshold, the control module uses the whitelist value to reevaluate the performance level of the receiver, and applies the whitelist value to the compensation module when the reevaluated performance level is above the performance level threshold.

A high-speed serial data system includes a transmitter and a receiver. The receiver includes a compensation module, a memory, and a control module. The compensation module includes a setting that selects a compensation value from among a plurality of compensation values for a characteristic of the receiver. The memory stores a whitelist value from among the compensation values. The control module determines that a performance level of the receiver is below a performance level threshold. In response to determining that the performance level is below the performance level threshold, the control module uses the whitelist value to reevaluate the performance level of the receiver, and applies the whitelist value to the compensation module when the reevaluated performance level is above the performance level threshold.

A system for optimum phase searching in an Ethernet physical layer includes a time recovering circuit and an equalizer. The time recovering circuit includes a loop filter and a time error detector, and the equalizer includes a feed forward equalizer, a slicer and a feed backward equalizer. An optimum phase searching method includes obtaining optimum phases when mean squared errors calculated by the slicer are less than a first threshold, absolute values of mean values of outputs calculated by a time error detector are less than a second threshold, and the outputs are monotonic.

Methods and apparatuses are provided for channel equalization in a communication system. The method includes initializing, using processing circuitry, filter coefficients of an adaptive decision feedback equalizer randomly in a predetermined search space. Further, the method includes updating, using the processing circuitry, the filter coefficients. The filter coefficients are updated using a least mean square recursion when the filter coefficients are stagnant. The filter coefficients are updated using a particle swarm optimization procedure when the filter coefficients are not stagnant. Further, the updating step is repeated until a predetermined stopping criteria is met. Further, the method includes, filtering, using the processing circuitry, a received signal using the filter coefficients.

Methods and apparatuses are provided for channel equalization in a communication system. The method includes initializing, using processing circuitry, filter coefficients of an adaptive decision feedback equalizer randomly in a predetermined search space. Further, the method includes updating, using the processing circuitry, the filter coefficients. The filter coefficients are updated using a least mean square recursion when the filter coefficients are stagnant. The filter coefficients are updated using a particle swarm optimization procedure when the filter coefficients are not stagnant. Further, the updating step is repeated until a predetermined stopping criteria is met. Further, the method includes, filtering, using the processing circuitry, a received signal using the filter coefficients.