A single channel receiver includes an input terminal that receives an analog input signal, a mixer that down-mixes the analog input signal by use of a phase- and/or frequency-corrected oscillator frequency signal and shifts complex-valued information contained in the analog input signal to the real part (or alternatively to the imaginary part) to obtain an intermediate real-valued analog signal, an analog-to-digital-converter that converts the intermediate analog signal into an intermediate digital signal, a demodulator that demodulates the intermediate digital signal into a digital output signal, a phase tracking loop that detects zero-crossings in the intermediate digital signal to obtain phase error information representing a phase error in the intermediate digital signal, and an oscillator that generates the phase- and/or frequency-corrected oscillator frequency signal by compensating the phase and/or frequency error in the intermediate digital signal by correcting the phase of the oscillator frequency signal with the phase error information.

A modulated RF carrier produced at the output of the polar transmitter's switch-mode power amplifier (SMPA) is conveyed to an output filter network comprising a harmonic low-pass filter (LPF) connected in parallel with an absorptive high-pass filter (HPF). Together the harmonic LPF and absorptive HPF pass the fundamental component of the modulated RF carrier to the polar transmitter's load while also absorbing higher harmonic components that would otherwise be undesirably reflected back toward the output of the SMPA.

A technique uses linear prediction to determine the location of spurious content in a digital phase-locked loop and suppresses the spurious content from propagating to the clock output. In at least one embodiment, the technique implements an iterative (e.g., recursive) computation.

A receiver circuit includes a feedback loop including a device. The receiver circuit also includes a register and a sequencer. The sequencer is configured to, responsive to an error signal being below a threshold value, cause the register to store a value indicative of the state of the feedback loop. The sequencer is also configured to cause the feedback loop to transition to a lower power state, and, responsive to a detected wake-up event, cause the previously stored value indicative of the state of the feedback loop to be loaded from the register into the device and enable the feedback loop.

A method and apparatus for modulating/demodulating an FSK signal capable of overcoming a trade-off relationship between a modulation index and a spectral efficiency are disclosed. An apparatus for modulating/demodulating a frequency deviation keying (FSK) signal includes a channel selection-modulator, a phase locked loop, and an output unit. The channel selection-modulator modulates an FSK signal by setting a frequency channel to be used. The phase locked loop generates a desired output frequency ‘fout’ compared to a reference frequency ‘f.sub.REF’ by adjusting a frequency division ratio (N+n) with respect to a frequency of the modulated FSK signal. The output unit amplifies the FSK signal having the generated output frequency ‘fout’ and radiating the amplified FSK signal through an antenna. Here, each of the frequency channels is divided into two or more tones, and different frequency channels are allocated between the tones divided into two or more tones.

A receiver circuit includes a feedback loop including a device. The receiver circuit also includes a register and a sequencer. The sequencer is configured to, responsive to an error signal being below a threshold value, cause the register to store a value indicative of the state of the feedback loop. The sequencer is also configured to cause the feedback loop to transition to a lower power state, and, responsive to a detected wake-up event, cause the previously stored value indicative of the state of the feedback loop to be loaded from the register into the device and enable the feedback loop.

A method and apparatus for modulating/demodulating an FSK signal capable of overcoming a trade-off relationship between a modulation index and a spectral efficiency are disclosed. An apparatus for modulating/demodulating a frequency deviation keying (FSK) signal includes a channel selection-modulator, a phase locked loop, and an output unit. The channel selection-modulator modulates an FSK signal by setting a frequency channel to be used. The phase locked loop generates a desired output frequency ‘fout’ compared to a reference frequency ‘f.sub.REF’ by adjusting a frequency division ratio (N+n) with respect to a frequency of the modulated FSK signal. The output unit amplifies the FSK signal having the generated output frequency ‘fout’ and radiating the amplified FSK signal through an antenna. Here, each of the frequency channels is divided into two or more tones, and different frequency channels are allocated between the tones divided into two or more tones.

A single channel receiver includes an input terminal that receives an analog input signal, a mixer that down-mixes the analog input signal by use of a phase- and/or frequency-corrected oscillator frequency signal and shifts complex-valued information contained in the analog input signal to the real part (or alternatively to the imaginary part) to obtain an intermediate real-valued analog signal, an analog-to-digital-converter that converts the intermediate analog signal into an intermediate digital signal, a demodulator that demodulates the intermediate digital signal into a digital output signal, a phase tracking loop that detects zero-crossings in the intermediate digital signal to obtain phase error information representing a phase error in the intermediate digital signal, and an oscillator that generates the phase- and/or frequency-corrected oscillator frequency signal by compensating the phase and/or frequency error in the intermediate digital signal by correcting the phase of the oscillator frequency signal with the phase error information.

A radio frequency (RF) transceiver includes a reference signal source to generate a reference signal, a local RF source to generate a local RF signal and a mixed-signal phase/frequency detector to compare the reference signal to the local RF signal, and to generate a difference signal from the comparison, wherein the difference signal comprises a modulation component and an error component. The transceiver also includes a receiver front end to receive and downconverts an angle-modulated RF signal to a baseband signal, a quadrature modulator configured to angle-modulate the reference signal source with the baseband signal.

A receiver device implements enhanced data reception with edge-based clock and data recovery such as with a flash analog-to-digital converter architecture. In an example embodiment, the device implements a first phase adjustment control loop, with for example, a bang-bang phase detector, that detects data transitions for adjusting sampling at an optimal edge time with an edge sampler by adjusting a phase of an edge clock of the sampler. This loop may further adjust sampling in received data intervals for optimal data reception by adjusting the phase of a data clock of a data sampler such a flash ADC. The device may also implement a second phase adjustment control loop with, for example, a baud-rate phase detector, that detects data intervals for further adjusting sampling at an optimal data time with the data sampler.