H04L25/247

QUADRATURE CIRCUIT INTERCONNECT ARCHITECTURE WITH CLOCK FORWARDING
20240097872 · 2024-03-21 ·

An integrated circuit communication architecture is provided and includes a clock lane, a clock divider, and a first de-skew circuit. The clock lane is configured to send a clock signal at a first rate from a first chip to a second chip. The clock divider is on the second chip and is configured to receive the clock signal sent via the clock lane and to create and send a first divided clock signal and a second divided clock signal from the received clock signal. The divided clock signals are sent at reduced rates compared to the first rate. The clock divider maintains current mode logic properties for the divided clock signals. The first de-skew circuit is configured to receive and process the divided clock signals to allow for sampling of data transmitted from the first chip to the second chip.

Quadrature circuit interconnect architecture with clock forwarding

An integrated circuit communication architecture is provided and includes a clock lane, a clock divider, and a first de-skew circuit. The clock lane is configured to send a clock signal at a first rate from a first chip to a second chip. The clock divider is on the second chip and is configured to receive the clock signal sent via the clock lane and to create and send a first divided clock signal and a second divided clock signal from the received clock signal. The divided clock signals are sent at reduced rates compared to the first rate. The clock divider maintains current mode logic properties for the divided clock signals. The first de-skew circuit is configured to receive and process the divided clock signals to allow for sampling of data transmitted from the first chip to the second chip.

Network element clock synchronization systems and methods using optical transport network delay measurement
09608755 · 2017-03-28 · ·

The present disclosure provides Network Element (NE) clock synchronization using Optical Transport Network (OTN) delay measurement systems and methods such as described in ITU-T G.709 (December 2009) Interfaces for the Optical Transport Network (OTN) and G.798 (October 2010) Characteristics of optical transport network hierarchy equipment functional blocks. OTN provides a Delay Measurement (DM) function to measure fiber path latency between two network elements to within microsecond accuracy. The convergence of packet switching and OTN transport into the same network element allows the sharing of this information between the two applications. The OTN delay measurement value can be used to synchronize two network element clocks to within microsecond accuracy without the need for a costly GPS synchronization solution or reduced accuracy NTP solutions.