Patent classifications
H04L27/06
Signal analysis apparatus and method for analyzing a symbol sequence
A signal analysis apparatus for analyzing an input signal is described. The input signal includes a symbol sequence. The symbol sequence includes data information and redundant data information. The signal analysis apparatus includes one or more circuits composed of a decoder module, an error correction module, and a processing module. The decoder module is configured to decode the input signal, thereby obtaining a decoded input signal. The error correction module is configured to identify at least one error in the decoded input signal. The processing module is configured to generate a data set. The data set includes information on the at least one identified error. The data set further includes information on at least one of a portion of the input signal being associated with the error and a portion of the decoded input signal being associated with the error. Further, a signal analysis device and a signal analysis method are described.
Signal analysis apparatus and method for analyzing a symbol sequence
A signal analysis apparatus for analyzing an input signal is described. The input signal includes a symbol sequence. The symbol sequence includes data information and redundant data information. The signal analysis apparatus includes one or more circuits composed of a decoder module, an error correction module, and a processing module. The decoder module is configured to decode the input signal, thereby obtaining a decoded input signal. The error correction module is configured to identify at least one error in the decoded input signal. The processing module is configured to generate a data set. The data set includes information on the at least one identified error. The data set further includes information on at least one of a portion of the input signal being associated with the error and a portion of the decoded input signal being associated with the error. Further, a signal analysis device and a signal analysis method are described.
BASEBAND PROCESSOR AND METHOD FOR POWER SAVING BY ADJUSTMENT OF CLOCK RATE AND SUPPLY VOLTAGE
The disclosure relates to a baseband processing method, comprising: receiving a downlink (DL) baseband (BB) signal in a transmission time interval (TTI), wherein the DL BB signal comprises a time-frequency resource comprising a control section and a data section; decoding at least part of the control section to detect a DL grant information; if the DL grant information is detected, determine a number of granted data resource blocks from the DL grant information; and adjust at least one of a clock rate and supply voltage of the baseband processing based on the number of granted resource blocks.
BASEBAND PROCESSOR AND METHOD FOR POWER SAVING BY ADJUSTMENT OF CLOCK RATE AND SUPPLY VOLTAGE
The disclosure relates to a baseband processing method, comprising: receiving a downlink (DL) baseband (BB) signal in a transmission time interval (TTI), wherein the DL BB signal comprises a time-frequency resource comprising a control section and a data section; decoding at least part of the control section to detect a DL grant information; if the DL grant information is detected, determine a number of granted data resource blocks from the DL grant information; and adjust at least one of a clock rate and supply voltage of the baseband processing based on the number of granted resource blocks.
WAKE UP RADIO DEVICE, CIRCUIT CONFIGURATION, AND METHOD
According to the present disclosure, a communication device configured to power on a main receiver to receive data from a network includes: a low power receiver configured to receive a wake up packet, including a preamble, from the network and oversample the wake up packet; a circuit arrangement including: a correlator configured to correlate the oversampled portion of the preamble; a delay and adder configured to take an output of the correlator, delay the output of the correlator, and add the output of the correlator back onto itself to produce a delay output; a peak detector configured to detect a peak pattern in the delay output; a demodulator configured to calculate a decoding threshold value to produce a demodulated data; and a packet parser configured to check the demodulated data for a data set in order to selectively output a nonzero signal to power on the main receiver.
DTV RECEIVING SYSTEM AND METHOD OF PROCESSING DTV SIGNAL
A digital television (DTV) receiving system includes an information detector, a resampler, a timing recovery unit, and a carrier recovery unit. The information detector detects a known data sequence which is periodically inserted in a digital television (DTV) signal received from a DTV transmitting system. The resampler resamples the DTV signal at a predetermined resampling rate. The timing recovery unit performs timing recovery on the DTV signal by detecting a timing error from the resampled DTV signal using the detected known data sequence. The carrier recovery unit performs carrier recovery on the resampled DTV signal by estimating a frequency offset value of the resampled DTV signal using the detected known data sequence.
Signal processing device and transmission device
A signal processing device includes: a memory; and a processor coupled to the memory and configured to: perform soft decision of a value of, among bit strings, a predetermined bit string encoded with a soft decision code from a symbol assigned to, according to each value of the bit strings, the bit strings having been subject to encoding of an outer code with a turbo product code and encoding of an inner code with the soft decision code; decode the predetermined bit string with the soft decision code on a basis of a result of the soft decision; individually perform, from the symbol, the soft decision of a value of each bit string other than the predetermined bit string among the bit strings; and decode the bit strings with the turbo product code on a basis of a result of the decoding and a result of the soft decision.
Receiver/transmitter co-calibration of voltage levels in pulse amplitude modulation links
A driver circuit of a PAM-N transmitting device transmits a PAM-N signal via a communication channel, wherein N is greater than 2, and the PAM-N signal has N signal levels corresponding to N symbols. A PAM-N receiving device receives the PAM-N signal. The PAM-N receiving device generates distortion information indicative of a level of distortion corresponding to inequalities in voltage differences between the N signal levels. The PAM-N receiving device transmits to the PAM-N transmitting device the distortion information indicative of the level of the distortion. The PAM-N transmitting device receives the distortion information. The PAM-N transmitting device adjusts one or more drive strength parameters of the driver circuit of the PAM-N transmitting device based on the distortion information.
Detection of phishing attacks using similarity analysis
A computerized system and method to detect phishing cyber-attacks is described. The approach entails analyzing one or more displayable images of a webpage referenced by a URL to ascertain whether the one or more displayable images, and thus the webpage and potentially an email including the URL, are part of a phishing cyber-attack.
PAM-N receiver capable of adaptively adjusting threshold voltages determining level of data in received signal and method of adaptively adjusting threshold voltages of PAM-N receiver
A PAM-N receiver capable of adaptively adjusting threshold voltages determining a level of a received signal and a method of adaptively adjusting threshold voltages thereof are disclosed. According to the method of the present invention, the result of comparison between reference data levels and the level of data in the received signal are used to adjust the reference data levels, and the threshold voltages of a PAM-N receiver are adaptively calculated from the adjusted reference data levels, thereby reflecting transmission line conditions and Inter-Symbol Interference.