H04L7/0095

LOW-LATENCY, HIGH-AVAILABILITY AND HIGH-SPEED SERDES INTERFACE HAVING MULTIPLE SYNCHRONIZATION MODES

A computer-implemented method includes using a transmitter to send data from the transmitter through a plurality of lanes to a receiver using a synchronous operation mode that includes sending the data from the transmitter through the plurality of lanes to the receiver in a synchronous transmission manner that relies on an alignment between a transmitter clock frequency and a receiver clock frequency. A synchronous operation performance analysis (SOPA) is performed during the synchronous operation mode. A switch from the synchronous operation mode to an asynchronous operation mode is made based on a result of performing the SOPA. The asynchronous operation mode includes sending the data from the transmitter through the plurality of lanes to the receiver without requiring alignment between the transmitter clock frequency and the receiver clock frequency.

Low-latency, high-availability and high-speed SerDes interface having multiple synchronization modes

A computer-implemented method includes using a transmitter to send data from the transmitter through a plurality of lanes to a receiver using a synchronous operation mode that includes sending the data from the transmitter through the plurality of lanes to the receiver in a synchronous transmission manner that relies on an alignment between a transmitter clock frequency and a receiver clock frequency. A synchronous operation performance analysis (SOPA) is performed during the synchronous operation mode. A switch from the synchronous operation mode to an asynchronous operation mode is made based on a result of performing the SOPA. The asynchronous operation mode includes sending the data from the transmitter through the plurality of lanes to the receiver without requiring alignment between the transmitter clock frequency and the receiver clock frequency.

TIME SYNCHRONIZATION SYSTEM
20250150251 · 2025-05-08 ·

The time synchronization system 1 includes a plurality of synchronization sources 100 each of which outputs time information, and a calculator 200 that executes a predetermined process to each time information that is output from the plurality of synchronization sources 100, wherein each of the plurality of synchronization sources 100 has an oscillator 30 and a detector 40 that outputs variation information of the oscillator 30 and the calculator 200 changes the predetermined process to be executed on the time information based on the variation information output from the detector 40 of each of the plurality of synchronization sources 100.